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subtraction instruction in pic

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4electros

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I was read at website the follows:
The subtraction operation always computes F-W, so be careful that you don't mean W-F. So if W contains 3 and x contains 10, performing a subtraction will result in 7. When subtracting, the C bit is a borrow flag. If the result was negative, then C will equal 0. If the C flag is 1, no borrow occurred. So computing 10-3 leaves C=1. But computing 3-10 will clear C. The result, in this case will be 0xF9 which is the two's compliment representation of -7.

To compute the two's compliment of a negative number, write the magnitude as a binary number. So for 7, we have 00000111. Then invert all the bits (11111000) and add 1 (11111001). You can easily reverse the process, so if I tell you the subtraction yields 0xF9, you can write it as binary (11111001), subtract 1 (11111000) and then invert the bits (00000111) to know that it means -7. When using this scheme the topmost bit acts like a sign bit.

The only problem is you can't readily tell a positive overflow from a negative number. For example, 0x70 is a positive number. Adding 0x70 to 0x70 yields 0xE0 which is correct, but is indistinguishable from a negative number. Therefore when performing signed arithmetic, you are limited to numbers from -128 to 127





but really don't understand the last section very well, could anyway advice me how to understand the idea in a good way , may be you can guide to other website which is designed to clear these things.
 
well.. i am not sure if i understand your problem... but when i was building a calculator, i was using an ATMEL uC, but i think the principle is the same, i used to verify that F is bigger than W, in case f is not bigger than W, i exchange them, and put "1" in any other register (S for example), wich i know that it contain 1 is the result is negative... then i substract normally F-W... here is an example:

F=10
W=3
S=0 (the sign is positive)
result = F - W = 7



example 2:

F=3
W=10
S=0
;exchange W and F and make S=1
F=10
W=3
S=1
result = F - W = 7 (with S=1 as negative sign)


hope this helped...
 
An 8-bit 2s complement, ie a signed char, can only express values ranging from -128 to 127. You can compute it yourself. The most negative being 0b10000000, the most positive being 0b01111111.

What the passage is trying to say is that when you use add or subtract operations, the output will always be in 2s complement. If the real result falls within the valid range of 2s complement, then the output is correct. Otherwise, an overflow has occurred.
 
4electros said:
Joel Rainville said:
The only problem is you can't readily tell a positive overflow from a negative number.

Do you understand that sentence?

no i don't understand that sentence i can't understnad why am i limmited to numbers from 128 to -127.

Actually you're limited to numbers from 0-255 in a single GPR, there's not really any such thing as negative numbers, if you want to use negative numbers in this way you have to manipulate some scheme for them your self.

As you've already suggested, the usual method for doing this is to use the highest bit as a negative flag.

By using more than one GPR you can extend the number range to anything you want, using two GP's gives 0-65545 (16 bit maths).

The magazine UK EPE has code on their website for 32 bit maths routines, which use 4 GPR's per number.
 
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