Oznog
Active Member
I am running the SSP I2C on a PIC18F252 in Slave mode.
The Master is a separate piece I can physically disconnect. When that happens, the Slave is supposed to go into Sleep mode until another I2C interrupt occurs. The Slave hardware has pullup resistors to keep the values high.
Prob is, after the Master is disconnected, the Slave is still experiencing SSP interrupts at a regular period, just under 1 sec. This makes no sense- both SCK and SDA pins remain high on the scope. It looks like S=1, DA=RW=BF=0 when the interrupt occurs.
I made sure all the assigns to PortC pins used the C latch rather than the Reg. No difference.
Additionally this is the same system which keeps losing a byte periodically while data goes from Slave to Master. Maybe it's a related problem, maybe not.
SSPADD= SLAVE_I2C_ADDR;
SSPCON2 = 0b00000001; // Enable clock stretching
SSPSTAT = 0b00000000;
SSPCON1= 0b00110110; // Slave mode, 7 bit no interrupts
The Master is a separate piece I can physically disconnect. When that happens, the Slave is supposed to go into Sleep mode until another I2C interrupt occurs. The Slave hardware has pullup resistors to keep the values high.
Prob is, after the Master is disconnected, the Slave is still experiencing SSP interrupts at a regular period, just under 1 sec. This makes no sense- both SCK and SDA pins remain high on the scope. It looks like S=1, DA=RW=BF=0 when the interrupt occurs.
I made sure all the assigns to PortC pins used the C latch rather than the Reg. No difference.
Additionally this is the same system which keeps losing a byte periodically while data goes from Slave to Master. Maybe it's a related problem, maybe not.
SSPADD= SLAVE_I2C_ADDR;
SSPCON2 = 0b00000001; // Enable clock stretching
SSPSTAT = 0b00000000;
SSPCON1= 0b00110110; // Slave mode, 7 bit no interrupts