void interrupt() // 8-usec (128 cycle) interrupts
{ pir1.TMR2IF = 0; // clear interrupt flag
txreg = Precalc; //
Precalc = 0; //
fsr2 = rowaddr; // fsr2 = &red[row][0] (0x100..0x13F)
asm //
{ movf _interval,W // interval, 0..255
cpfsgt _postinc2 // if(interval >= red[row][0]) {
bsf _Precalc,0 // Precalc |= 1; }
cpfsgt _postinc2 // if(interval >= red[row][1]) {
bsf _redPrecalc,1 // Precalc |= 2; }
cpfsgt _postinc2 // if(interval >= red[row][2]) {
bsf _Precalc,2 // Precalc |= 4; }
cpfsgt _postinc2 // if(interval >= red[row][3]) {
bsf _Precalc,3 // Precalc |= 8; }
cpfsgt _postinc2 // if(interval >= red[row][4]) {
bsf _Precalc,4 // Precalc |= 16; }
cpfsgt _postinc2 // if(interval >= red[row][5]) {
bsf _Precalc,5 // Precalc |= 32; }
cpfsgt _postinc2 // if(interval >= red[row][6]) {
bsf _Precalc,6 // Precalc |= 64; }
cpfsgt _indf2 // if(interval >= red[row][7]) {
bsf _Precalc,7 // Precalc |= 128; }
}
while(!pir1.TXIF) // is this right?
txreg = Precalc; //
Precalc = 0; //
fsr2 |= 64; // fsr2 = &grn[row][7] (0x140..0x17F)
asm //
{ incf _interval,W // interval, 0..255
cpfsgt _postdec2 // if(interval >= grn[row][7]) {
bsf _Precalc,7 // Precalc |= 128; }
cpfsgt _postdec2 // if(interval >= grn[row][6]) {
bsf _Precalc,6 // Precalc |= 64; }
cpfsgt _postdec2 // if(interval >= grn[row][5]) {
bsf _Precalc,5 // Precalc |= 32; }
cpfsgt _postdec2 // if(interval >= grn[row][4]) {
bsf _Precalc,4 // Precalc |= 16; }
cpfsgt _postdec2 // if(interval >= grn[row][3]) {
bsf _Precalc,3 // Precalc |= 8; }
cpfsgt _postdec2 // if(interval >= grn[row][2]) {
bsf _Precalc,2 // Precalc |= 4; }
cpfsgt _postdec2 // if(interval >= grn[row][1]) {
bsf _Precalc,1 // Precalc |= 2; }
cpfsgt _indf2 // if(interval >= grn[row][0]) {
bsf _Precalc,0 // Precalc |= 1; }
}
if(++interval == 0) // if end-of-period
{ asm { //
rlncf _rowsel,F // advance row select bit mask
} //
latc = ~rowsel; // select new row (active low)
rowaddr += 8; // prep for next row
rowaddr &= 0b10111111; // 0x100..0x13F, inclusive
}
while(!pir1.TXIF) // is this right?
stb = 1; stb = 0; // latch data onto outputs
}