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Sine wave from PWM h-bridge

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I'm wanting to power a transformer using an h-bridge controlled from a sine modulated PWM signal.
Which would be better, only switching between +Vin to -Vin, or for the positive half of the sine wave swithcing between +Vin to 0 and for negative part -Vin to 0.
If the latter, during off part of the PWM signal, should I have the two low mosfets on, shorting the load, or have all mosfets off?
 
If I understand the pdf correctly, switching +V to 0 for the positive half of the sine wave and then -V to 0 (bottom of fig. 37.3) is the way to go as it produces less distortion and will give me a truer sine wave. Is this correct?
What do I do for the 0V part of the PWM wave? I already have diodes in anti-parallel with the mosfets. Should all mosfets be off or should the two high or two low ones be on as it inductive load and current will try to keep flowing.

Also would centre aligned PWM be better than edge aligned?

Edit: I think what the pdf is saying is that one side of the h-bridge can be controlled by a constant frequency square wave of the same frequency as the sine wave, whilst the other side is controlled by the pwm signal.
Visualizing this I see that for one half of the sine wave, the two low mosfets will be on during the off period and in the other half the sine wave the two high mosfets will be on during the off period.
Is this right, is there anything else I should know?
 
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Normally you only have a +ve supply (e.g. 400v) and 0v. The H bridge turns this into +ve and -ve. Running at say 16kHz and 50% duty cycle (half +ve and half -ve) gives you 0v output, but this is not the same as your 0v input.
 
Having read more literature on the subject and learning the terms I realise my original question was essentially, "What is better, 2-level or 3-level PWM".
Here is an example of 3-level PWM showing what I meant which can be achieved with an h-bridge:
320px-PWM%2C_3-level.svg.png


My follow up question was during the 0V parts of V in the picture above, should all mosfets be off, or two high/low ones on which appears to be the answer so current can keep flowing in the inductive load.
 
With a single supply to get the "0v" in the output, you have to switch off all the H bridge devices and wait for the current through the motor to decay to zero, else the inductive current will swing fully the other way and continue to conduct through the H bridge device parallel diodes. That is not ideal as you would need discontinuous current through the motor at the switching frequency. Another way is to add extra devices across the motor to short it out when all the H bridge devices are off. Not in my opinion a good solution. It is much simpler to go with +ve and -ve switching. By the way your diagram is a little wierd. It is not a sine wave unless you integrate the pulses.
 
1." The diagram is the same as fig 37.3 in the pdf you linked although realistically the current would fall a little in the off times."
No it's not, it is very different. In a real world motor, the motor drives something and this load tends to pull the current towards unity power factor. i.e. the current and voltage tend to align let's say a PF of 0.7 to 0.8. What you have is a pure inductor with no resistive losses. The real world load looks like resistive losses.

2. Thanks for the diagrams. That would give you 0v across the motor without extra devices. Nice! Hadn't seen that before, or if I had and I had forgotten.

3. Using the 0v will reduce your di/dt through the motor, which is desireable.
 
I see now. I just grabbed the diagram off google as it resembled what I was thinking but I didn't notice the phase delay.
This one is correct right?
pwm_sinewave.png


I'm using a microcontroller to generate the PWM signal and I've noticed that increasing the PWM frequency (therefore the number pulses that represent the sine wave) I have to decrease the resolution of its duty cycle (the number of discrete duty cycles I can choose from).
Any idea what the ideal trade off would be?
 
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I'm using a micro controller to generate the PWM signal and I've noticed that increasing the PWM frequency (therefore the number pulses that represent the sine wave) I have to decrease the resolution of its duty cycle (the number of discrete duty cycles I can choose from).
Any idea what the ideal trade off would be?
Example:
If your PWM is set to 10 bits it takes 1024 clocks to get a result.
If your PWM is set to 8 bits it takes 256 clocks to get a result. (you get results 2x faster)
If your PWM is set to 6 bits it takes 64 clocks to get a result. (you get results 4x faster)

Two options:
Draw a sign wave using very little points (time is not accurate) but the voltage is very accurate.
Draw a sigh wave using many points (time is accurate) but the voltage is not as accurate.

There is a filter used to remove the PWM frequency and leave the 60hz. The filter wants the PWM frequency to be high.
 
Two options:
Draw a sign wave using very little points (time is not accurate) but the voltage is very accurate.
Draw a sigh wave using many points (time is accurate) but the voltage is not as accurate.
Yes, this is the problem and somewhere in between the two extremes it seems an ideal would exist. I'm having trouble finding much online about it.
Perhaps I can take the output, do a harmonic analysis on various different combinations and see what gives the dominant primary frequency?
 
Thought I'd upload some results.
I'm using a simple inductor as the load and 8bit resolution for the pwm.


pwm.jpg

Here's the h-bridge input PWM signal. I'm using a frequency ratio of 15 just to make it visible.


15.jpg

Ignore the red wave. The green wave is the current. The reading resolution isn't great as I've zoomed in a fair bit.


45.jpg

Here it is again using a frequency ratio of 45. It looks pretty much the same due to the poor reading resolution, but I'm quite confident that's a sine wave!
 
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