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Simulating a High Output Impedance From D/A

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wuchy143

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Hi All,

I'm trying to simulate the effect of the 500k Ohm output impedance to my amplifier. The D/A is the MCP4921. I did it by just putting in a 500k Ohm(from datasheet) to ground on the input to my " - " terminal on my OPA. Is this a viable/appropriate way of simulating a high output impedance in LTSpice?

Circuit below.
 

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hi wuchy,
If you add any source resistance to that non invert input it will lower the OPA gain.!
 
What are you trying to do?
You could replace the 500k with a sign wave signal source and edit the source to have 500k ohms.
If you DAC had 500k and you drive an amplifier with 20k input impedance you just made a voltage divider. OR As Eric said "low gain".
Do you want to buffer the DAC output, and level shift, and maybe add some gain?
 
Hi All,

I'm trying to simulate the effect of the 500k Ohm output impedance to my amplifier. The D/A is the MCP4921. I did it by just putting in a 500k Ohm(from datasheet) to ground on the input to my " - " terminal on my OPA. Is this a viable/appropriate way of simulating a high output impedance in LTSpice?

Circuit below.

hi wuchy,
Checking the MCP4921 datasheet, why do you think the output impedance is 500K.?

The two DAC outputs are buffered, so should be very low impedance.
 
hi wuchy,
Checking the MCP4921 datasheet, why do you think the output impedance is 500K.?

The two DAC outputs are buffered, so should be very low impedance.

Hmm. I must be reading the datasheet incorrectly. Look at page 20 of this datasheet. https://ww1.microchip.com/downloads/en/DeviceDoc/22248a.pdf It says that upon power up in section 4.2.3 that until a write is received the outputs are in high impedance. Typically 500k.

Let me explain why I'm doing this test to alleviate some confusion. Upon power up the device I'm working on(a tension controller with 0-10V output) the output amplifier(the one I posted above) is spiking up to about +5.5V for about 100uS then going down to the expected output voltage of 0V. I checked voltages( - , +, output) of my amp and it is doing what it's supposed to do.

I then wanted to try and SIM what I was seeing and when I put in the 500k resistor I'm getting an almost identical result upon powerup. I just wanted to see if what I was doing/seeing made sense.
 
hi,
Its only high impedance in the 'shut down' mode, so its inactive, so it will not matter what effect it has on your OPA.
 

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hi,
Its only high impedance in the 'shut down' mode, so its inactive, so it will not matter what effect it has on your OPA.

I'm a little confused. In section 4.2.3 it specifically says, "4.2.3 POWER-ON RESET CIRCUIT The internal Power-on Reset (POR) circuit monitors the power supply voltage (VDD) during device operation. The circuit also ensures that the device powers up with high output impedance (<SHDN> = 0, typically 500 k. The devices will continue to have a highimpedance output until a valid write command is
received, and the LDAC pin meets the input low threshold"

Doesn't that mean I have a 500k path to GND when looking into the output pin of the MCP4921?

I read what you showed me on the POR. That makes sense.
 
In order to use the D2A you have to initialise it after power up, so after that, the 500K output impedance will not be 'seen' by your OPA circuit.

The D2A will only revert to the 500k state if your program 'shuts' it down.

When in the 500k state your OPA gain will be reduced, but as your program should not be reading the OPA output, when the D2A is 'non operational [shut down]' it should not cause a problem.
 
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