Simple question

[Electronics4you]

How can two PICs share an external E2PROM?

Both read and write without getting in the way of each other and how to shae the inputs of the E2PROM

 

[Nigel Goodwin]

Yes they can, I2C has the capability of 'multi-master', but you would have to create some scheme to avoid collisions.

But why would you want to anyway?.

 

[-=GST=- Nemisis (cs/cz)]

you would have to create some scheme to avoid collisions.

could that be done by connecting the two pics together and making sure they dont clash?

 

[evandude]

but you would have to create some scheme to avoid collisions.

could that be done by connecting the two pics together and making sure they dont clash?

Was that supposed to be an answer? because it sounds like you are just re-stating the problem...

The I2C specification has some information about how multi-master systems are supposed to work, ie - how the masters must behave to avoid collisions. If you want to implement this without adding any communication other than the I2C bus itself, I suggest you download the I2C specification and start looking it over.

 

[-=GST=- Nemisis (cs/cz)]

Was that supposed to be an answer?

no which is why i put a question mark at the end of the sentence.

 

[Ambient]

If the two controllers had one signal each to tell the other controller when not to write then it might work. It may be as simple as setting an output to a certain state when one controller is writing data to the memory, and the other controller would just wait for the signal to be changed. You could use a mux to avoid losing output pins.

I have not done this yet, but I imagine there is a better way than my 1 minute solution.

 

[evandude]

Okay, well, I was originally going to let the OP do this, but a google search for "i2c multi master" turned up this:

There are I2C environments where multiple masters are driving the bus.

In such case each device needs to be able to cooperate with the fact that another device is currently talking and the bus is therefore busy.

This translates into:

a) Being able to follow arbitration logic. If two devices start to communicate at the same time the one writing more zeros to the bus (or the slower device) wins the arbitration and the other device immediately discontinues any operation on the bus.

b) Bus busy detection. Each device must detect an ongoing bus communication and must not interrupt it. This is achieved by recognizing traffic and waiting for a stop condition to appear before starting to talk on the bus.



If you plan to use a multimaster device on a bus it is essential that all masters are multimasters. A single-master is simply a device, which does not understand the above mechanisms. If a singlemaster and a multimaster are connected, the singlemaster may well interrupt the multimaster causing unpredictable results.

by the nature of I2C, all drivers are open-collector, and pull-up resistors are required to achieve a high logic level when nothing is driving a line low. There's at least never any danger of two devices trying to simultaneously drive the bus high and low and damaging things. In terms of what it takes for a master to detect that another master is writing to the bus: well of course any time it wants to start a packet, it should check to make sure the bus "looks" ready for it (SCL and SDA high). And any time it sets one of its outputs to high-impedance, expecting the pull-up to take the bus high, it should just have to quickly check if the bus actually WENT high or not, and if it didn't, abort and wait for another opportunity.