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Selecting filter cap for square wave PWM signal ADC

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Stiive

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Hi All,
I'm designing a DTC 3-phase motor controller which needs to know the 3-phase voltages.
The motor voltages will be 0-400V PWM which will be scaled 131:1 for my 0-3.6 ADC input. The DTC may issue a new switching state every 5uS, and I plan to allow the signal 2.5uS to settle to its new value, which will leave me another 2.5uS to sample and convert the 3 voltages, before i need to issue another switch state.

I am using a voltage divider circuit to scale the voltages, and then input into a unity gain buffer op amp. As I don't have much time to take multiple samples (2.5uS) and average the new DC voltage (square wave high or low), I'd like to add in a filter cap.

I need these voltages to be extremely accurate, so i'm looking at a high precision opamp with ultra-low offset/drift/noise etc. I found the Maxim4239 which looks pretty good.

The slew rate of this opamp is 1.6V/uS, which means it will take 2.25uS to change from 0V to 3.6V (typical operation as PWM pulses switch between 0V and ~400VDC). This slew rate is however at conditions Vcc=5V, CL=100pF with Vout=2V step. This is a rail-rail opamp and i was thinking of running it at 3.6V with no resistor between the output and the ADC port (or filter cap charge resistor) [see attached picture], will this make a difference? Does the 2V step output make a difference? Could it perhaps be faster if its a 3.6V step?

So main question is, the opamp has an output short circuit current of 40mA (essentially what the filter cap will be without a precharge resistor) - what is the maximum filter cap I can put and still have the output stable after 2.5uS going from 0-3.6V???
Is it worth finding an opamp with a higher slew rate/short circuit current?

View attachment 64916


Thanks for your help in advance!
Stiive
 
Is this something that needs to wait until I have done my PCB design? Ideally the opamp output would be no further than 5mm away from the filter cap, so I'm guessing the resistance would be negligible. Access to GND will also be as close to the ADC as possible for good reference.
An 5*RC time constant < 2.25uS would be ideal, however i have a feeling this is going to be current limited (depending on the size of the cap) to the 40mA.
 
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I would put C_filter on the input of the op-amp. The op-amp driving a cap does not make much of a filter. Some amps are not stable driving much of a cap.

You could turn the op-amp into a high Q low pass filter.

Why the two transistors? What are you doing?
 
Thanks for your reply!

You could turn the op-amp into a high Q low pass filter.

Can i do this with just 1 opamp? Or do i require several?

Why the two transistors? What are you doing?

I'm hoping it will clamp my rail. I don't have much load on the 3V6 line so i don't want to dump any excess voltage there if there's a voltage spike on my voltage divider. Is there a better way to do this without hand selecting a zener?
 
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I'm with Ron. Put the filter on the input.
You need to be careful that the output doesn't get to the rail or the response goes south (see overload in the data sheet)
 
I'm with Ron. Put the filter on the input.
Yeh i don't know why i didn't think of that, as i said, i kicked myself. Still trying to figure out the effective time constant with R_VD_L and the cap in parallel. Obviously as the cap charges, more and more current with go through the resistor, i'm guessing this will slow its charging?

You need to be careful that the output doesn't get to the rail or the response goes south (see overload in the data sheet)
Ah i didn't see it takes that long to recover (3.3ms), that's unacceptable. not that I'm expecting it to go that high, but there may be the occasional voltage spike.
Ah well, easy fix, I also have a 5V line (bit noisey, but 140dB PSRR should handle that), so i'll run the rails from that.

Thanks for your reply.
 
I'm hoping it will clamp my rail. I don't have much load on the 3V6 line so i don't want to dump any excess voltage there if there's a voltage spike on my voltage divider. Is there a better way to do this without hand selecting a zener?

Actually, I added this circuit in before I had the buffer opamp - is it still required? Is there anyway a voltage spike can get through the opamp that's larger than the rail supply voltage?
I could ofcourse use this circuit now to stop my opamp from going into overload.
 
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Okay, I have attached updated circuit.
What you think?

Obviously still have not sized the C_filter cap yet.

View attachment 64923


Now that I'm using 5V for the opamps, i can change that clamp to say a 4.5V zener.... shouldn't leak much at 3.6V....
 
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Are you driving the motor with positive voltages only? Or do you need positive and negative voltages?

If so, you'll need to provide voltage rectification somewhere in the measurement chain.
 
Thanks for your reply.

I am reading phase-ground voltages (not phase-phase), which can either be Vdc or 0V (+- a few V).
 
If I understand correctly, you are digitizing the high and low PWM levels. Why are you doing that? Or did I misunderstand?
 
If I understand correctly, you are digitizing the high and low PWM levels. Why are you doing that? Or did I misunderstand?

I am trying to scale a 0-400V square wave to 0-3.6V for my ADC. I need a clamp to protect my ADC and a buffer to provide low output impedance.
 
I am trying to scale a 0-400V square wave to 0-3.6V for my ADC. I need a clamp to protect my ADC and a buffer to provide low output impedance.
That wasn't my question.

WHY do you want to digitize the PWM signal? Are you sampling at a rate that is much higher than the PWM frequency, or are you sampling only the peaks?
 
Sorry, I thought by digitising you meant taking discrete samples of the signal, which of course is needed for my MCU...
Are you then referring to my filter cap by trying to make it a DC signal either high or low? In that case, I'm doing this because the pulse width is only 5uS and i don't have time to take multiple samples within that 5uS and then average the results, so i figured it would be better to take 1 sample once its settled to its new state, with a small cap to hopefully block out some noise. I need this sample to be as accurate as possible!

So no I'm not sampling higher than the frequency, but I do wish to only sample the peaks.

Is there a better circuit for my method? I'm hoping to get 0.1% accuracy, this is outrageous isn't it?
 
Sorry, I thought by digitising you meant taking discrete samples of the signal, which of course is needed for my MCU...
Are you then referring to my filter cap by trying to make it a DC signal either high or low? In that case, I'm doing this because the pulse width is only 5uS and i don't have time to take multiple samples within that 5uS and then average the results, so i figured it would be better to take 1 sample once its settled to its new state, with a small cap to hopefully block out some noise. I need this sample to be as accurate as possible!

So no I'm not sampling higher than the frequency, but I do wish to only sample the peaks.

Is there a better circuit for my method? I'm hoping to get 0.1% accuracy, this is outrageous isn't it?
In Pulse Width Modulation, the duty cycle is modulated, not the pulse levels. They are constant.
Maybe I still don't understand. Are you filtering the PWM to provide a DC voltage, and then sampling that, or are you feeding the pulse waveform directly to your ADC (through a resistive divider and buffer)? If you are doing the latter, you are accomplishing nothing.
Tell us the BIG picture. I'll ask you for the third time:
Why are you digitizing the PWM signal?
 
In Pulse Width Modulation, the duty cycle is modulated, not the pulse levels. They are constant.
Ah i'm sorry, I see where I've misled you. It's not actually a PWM as such, I am not modulating duty cycle, rather just setting the motor phase to either high or low, and then reevaluating its state in 5uS. Therefore the minimum pulse width is 5uS. A very brief comparison of DTC vs other PWM drive is here: https://www05.abb.com/global/scot/scot201.nsf/veritydisplay/9f01a97f33f3df6bc125744f003b2db8/$file/factfiletd1_motor_control_with_dtc_revb_en_lowres.pdf
The amplitude of this pulse is dependent on the source voltage (including sag), switch state (connected to DC+ or DC-), and switching losses. Therefore the phase voltage can also be approximated by the DC bus voltage.

Maybe I still don't understand. Are you filtering the PWM to provide a DC voltage, and then sampling that, or are you feeding the pulse waveform directly to your ADC (through a resistive divider and buffer)? If you are doing the latter, you are accomplishing nothing.
I am doing the latter, with hope to get either a reading close to DC+, or 0V. This of course will change depending on the issues raised earlier. I will be switching a couple hundred amps, so I imagine voltage drops to be severe causing a DC bus ripple.
The control needs these values to estimate its torque and flux and rotor angle. These need to be as accurate as possible as everything is estimated from these readings.

Tell us the BIG picture. I'll ask you for the third time:
Why are you digitizing the PWM signal?
I am hoping to get a highly accurate reading of the phase voltage just before I issue a new switching state. I just need to know the (average) amplitude of the pulse, I know its width as I command when it starts and stops. Really the more readings the better because I convert these 3-phases into DQ reference plane and then integrate, but i think 5uS is quite short to do 3x 12bit voltage readings + 2x 12bit phase current readings.

Example of code and voltage readings: The MCU code will loop every 5uS to give a new switch state, where the phase voltages will be sensed @t-1uS (and stored in DMA) as they are needed for the control maths to determine the motors flux&torque in the control loop.
t=0, switching state=0 (tied to GND), voltage=0V ---> change to switch state 1
t=5uS, switching state=1 (tied to DC+), voltage=DC+ (+- switching losses & noise) measured at t=4uS (assume measurement takes 1uS) ---> remain switch state 1
t=10uS, switching state=1 (tied to DC+), voltage=DC+ (+- switching losses & noise) measured at t=9uS (assume measurement takes 1uS) ---> change to switch state 0
t=15uS, switching state=0 (tied to GND), voltage=0V (+- switching losses & noise) measured at t=14uS (assume measurement takes 1uS) ---> change to switch state 1

Here is a zoomed in picture of PhaseU's voltage wrt time. Yellow is actual phase voltage, purple is estimated from VDC*switchstate. The error between them is due to switching losses etc. Note that the DC bus voltage, and hence the amplitude of the pulses, are not flat due to the massive switching current. The skinnier pulses are 5uS, and the motor is sampled at 2e-7 to show transients
View attachment 65000

Here is a picture of the effect the error in the phase estimation (seen in previous picture) has on the torque and flux estimations. Note an error of 0.5V causes a big error in torque estimation (~15Nm). When this is scaled 131:1 as per my voltage divider, that resembles 3.8mV.
View attachment 65001
 
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