The CISC vs RISC thing really only made sense at the bleeding edge of processing speed. With fewer and less complex instructions you could clock the RISC CPU faster, and with luck, overcome the need for more instructions, in theory out preforming the slower more complex RISC machine.
I always wanted to build a super-reduced instruction set micro. It appeals to my sense of "minimalism".
All a micro really needs are two instructions;
* bit test, if bit set/clear goto X
* bit set/clear
(assuming the bit test and bit set/clear can be applied to both RAM and port pins)
Everything else can be done with those two instructions...