# Resistance minimizes capacitance?

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#### alphacat

##### New Member
Hey.
I read about probes in Wikipedia, and it was written there that in a 10x probe, there is a 9Mohm resistor that "serves to minimize the loading that the cable capacitance would impose on the DUT".

How is it possible?

Thank you for any explaination.

#### dknguyen

##### Well-Known Member
An infinite resistance completely isolates anything, right? So a lower resistance would isolate it too, but by less.

It limits the current that can flow from the DUT into the capacitance so the capacitance steals less current from the circuit under measurement than it otherwise would.

#### alphacat

##### New Member
Thanks.

The way I see it, adding a resistor in series only increases the charing and discharing times of the capacitor, but I dont understand how it decreases the capacitance loading ?

Or as you said, there is less current flowing through the capacitors, how does it decreases the capacitance loading?

#### Roff

##### Well-Known Member
Thanks.

The way I see it, adding a resistor in series only increases the charing and discharing times of the capacitor, but I dont understand how it decreases the capacitance loading ?

Or as you said, there is less current flowing through the capacitors, how does it decreases the capacitance loading?
The 9M resistor will have a capacitor in parallel, but it will be much less than the capacitance at the scope (or whatever) input.
See Fig. 3 at this site. Read the associated text.
Also see this document, section A.2 and beyond, for the math.

#### alphacat

##### New Member
The 9M resistor will have a capacitor in parallel, but it will be much less than the capacitance at the scope (or whatever) input.
See Fig. 3 at this site. Read the associated text.
Also see this document, section A.2 and beyond, for the math.

Man, these articles were awesome, specially the last one, it taught me a lot.

As I understood from the last article, only when the probe's bypass capacitor - Cp -(which is in parallel with the 9Mohm resistor) equals 1/9 of the scope's input capacitance - Cs - then Cs and Cp are connected in series, and therefore as you said, the loading capacitnace that is imposed on the DUT is Cs||Cp which is smaller then Cs.

only because of the Cp connected to it in parallel?

#### Roff

##### Well-Known Member
Man, these articles were awesome, specially the last one, it taught me a lot.

As I understood from the last article, only when the probe's bypass capacitor - Cp -(which is in parallel with the 9Mohm resistor) equals 1/9 of the scope's input capacitance - Cs - then Cs and Cp are connected in series, and therefore as you said, the loading capacitnace that is imposed on the DUT is Cs||Cp which is smaller then Cs.

only because of the Cp connected to it in parallel?
Cp keeps the frequency response of the network flat, which also keeps the pulse response flat.
Another way of looking at it is 9Meg*Cp=1Meg*Cs, for flat response.
Keep in mind that the resulting 10Meg input resistance will also reduce DC loading by a factor of 10.

#### alphacat

##### New Member
Thank you.
What i'm trying to understand is
2. and how?

is it the 9Mohm series resistor, or the Cp capacitor?

#### MikeMl

##### Well-Known Member
Neither. Formula for computing equivalent capacitance of two capacitors in series:

Ct=C1*C2/(C1+C2). If C1 = 10pF and C2 = 90pF; then Ct = 8.18pF

btw-are you a Troll?

#### Roff

##### Well-Known Member
Thank you.
What i'm trying to understand is
2. and how?

is it the 9Mohm series resistor, or the Cp capacitor?
1. It's the combination. As you noted, the resistor alone basically totally isolates the input from the capacitor, at the expense of very poor frequency response (slow pulse risetime). You have to add Cp to compensate for the series 9Meg resistor, so the resulting frequency response is flat.
2. Again, as you noted, the resuting capacitance is ideally one tenth the value of Cs.

#### Roff

##### Well-Known Member
Neither. Formula for computing equivalent capacitance of two capacitors in series:

Ct=C1*C2/(C1+C2). If C1 = 10pF and C2 = 90pF; then Ct = 8.18pF

btw-are you a Troll?
Ct=9.0pF. #### smanches

##### New Member
When you hook a cap up to a voltage source directly, it's going to pull as much current as it can to charge. If the source cannot supply enough current (a very small signal), then the "load" the capacitor puts on the source will cause a significant voltage drop which changes its waveform.

The 9MΩ resistor is acting as a current limiter, so the cap does not pull too much current too fast and change the voltage of the signal. That is what is meant when they say it changes capacitance load.

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#### alphacat

##### New Member
1. It's the combination. As you noted, the resistor alone basically totally isolates the input from the capacitor, at the expense of very poor frequency response (slow pulse risetime). You have to add Cp to compensate for the series 9Meg resistor, so the resulting frequency response is flat.
2. Again, as you noted, the resuting capacitance is ideally one tenth the value of Cs.
Thank you very much! When you hook a cap up to a voltage source directly, it's going to pull as much current as it can to charge. If the source cannot supply enough current (a very small signal), then the "load" the capacitor puts on the source will cause a significant voltage drop which changes its waveform.

The 9MΩ resistor is acting as a current limiter, so the cap does not pull too much current too fast and change the voltage of the signal. That is what is meant when they say it changes capacitance load.
How the capacitor connected directly to the voltage source causes a significant voltage drop?

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#### dknguyen

##### Well-Known Member
How the capacitor connected directly to the voltage source causes a significant voltage drop?
Capacitors need to be charged up before their voltage will change. So the capacitor will not allow the DUT voltage to change until it is charged up. It will steal lots of current from the DUT. The high current draw from the DUT distorts the DUT signal because the DUT is working harder and the capacitor's charging distorts the DUT signal because the capacitor delays changes in the DUT voltage.

A large resistor allows a very small amount of current flowing from the DUT to the capacitor to form a large voltage drop between the DUT and capacitor. The DUT only has to supply a small current to produce a voltage drop across the resistor. This capacitor steals less current from the DUT circuit which distorts it less because it is not working as hard, and the resistor allows the capacitor and DUT to have two different voltages with only a very small amount of current flowing between them.

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#### Roff

##### Well-Known Member
Thank you very much! How the capacitor connected directly to the voltage source causes a significant voltage drop?
IMHO, that was a misleading explanation. #### alphacat

##### New Member
Capacitors need to be charged up before their voltage will change. So the capacitor will not allow the DUT voltage to change until it is charged up. It will steal lots of current from the DUT. The high current draw from the DUT distorts the DUT signal because the DUT is working harder and the capacitor's charging distorts the DUT signal because the capacitor delays changes in the DUT voltage.

A large resistor allows a very small amount of current flowing from the DUT to the capacitor to form a large voltage drop between the DUT and capacitor. The DUT only has to supply a small current to produce a voltage drop across the resistor. This capacitor steals less current from the DUT circuit which distorts it less because it is not working as hard, and the resistor allows the capacitor and DUT to have two different voltages with only a very small amount of current flowing between them.

I think that Pspice disagrees with you.
I simulated the below circuit, and according to what you said, the red signal (V_source) shouldnt have had the form of a sinus wave, but should have looked like something else (I dont know what is that something since i'm not familiar with what you said).

But as you can see, the V_source is a pure sine wave.
(By the way, I used scaling in both signals' amplitudes). #### Attachments

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#### Roff

##### Well-Known Member
You picked a bad example. You can't overload an ideal voltage source with a capacitor. There is a saying among engineers that applies to simulators:
Garbage in=garbage out. If Pspice were a loaded gun, you would be dead by now. A nonlinear circuit is good for looking at the effects of probe loading. Look at the schematic below, and the resulting output waveforms with a 1X probe (90pF loading) and a 10X probe (9pF loading).

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#### alphacat

##### New Member
Thank you for this.

Could you explain these two waveforms?
I dont understand why in the 1x waveform, the rise time stays the same, but the fall time gets longer, why is that?

#### Roff

##### Well-Known Member
Thank you for this.

Could you explain these two waveforms?
I dont understand why in the 1x waveform, the rise time stays the same, but the fall time gets longer, why is that?
The rising edge looks the same in both circuits because the capacitor charges (rising edge) through the diode, which is a low impedance in the forward direction. When the input falls, the 90pF capacitor has to discharge through the 10k resistor. This discharge time is slower than the fall time of the input, so the diode cuts off (does not conduct).
In the compensated probe circuit, the net capacitance across the 10k is only 9pF, so it discharges more rapidly through the 10k resistor than did the 90pF, and the diode never cuts off, so the falling output edge looks like the input edge.

#### alphacat

##### New Member
Thank you very much.

The ratio between the overall capacitance in 1x probe (=90pf) and the overall capacitance in the 10x probe (=9pf) is only 10.
So you're saying that this 10's ratio is what causes the diode in the 10X circuit to stay ON during discharging?
Meaning, if the scope's input capacitance in the 1x circuit would be 9pF and not 90pF, then the diode in this circuit would also be ON all the time?

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