Questions about colpitts oscillator design?

[samy555]

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(1) How much the ratio C2/C1 should be in order to start oscillations?

(2) If the output signal is taken from emitter through a suitable capacitor, how will be the feedback path to the base if the transistor?

(3) We all know that there is a stray capacitance came of external connections and the internal capacity of the transistor itself. If I use a 2n3904 transistor which has the following data:
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My question is how much capacitance I should add to the series C1 and C2?

(4) Are there any effects from Cc cap on the oscillation frequency?

Thanks

 

[wakoko79]

(1) How much the ratio C2/C1 should be in order to start oscillations?

Start with a ratio of 1. Increasing the ratio will lead to higher loaded Q but it will lower the loop gain at the same time. So if there are no oscillations, you ought to decrease the ratio. I think there should be a small collector resistor there and a RFC at the collector. Lower collector resistor gives you higher loop gain but also remember that if the loop gain is too high, you'll operate in deep compression (Barkhausen theory). So it is a good idea to place a resistor there just in case you want to adjust the loop gain.

(2) If the output signal is taken from emitter through a suitable capacitor, how will be the feedback path to the base if the transistor?

I'm not quite sure what you meant here. But as you can see, the signal is sampled from the emitter then fed back to the base.

(3) We all know that there is a stray capacitance came of external connections and the internal capacity of the transistor itself. If I use a 2n3904 transistor which has the following data: My question is how much capacitance I should add to the series C1 and C2?

That matters a little, I think. As long as the capacitances you use are well above that stray capacitor (~20pF should do it). Besides, that data isn't exact. You are better off trying it for yourself, I would start with 60pF to be safe (and be closer to target frequency) though.
OK, I re-read your question. Am I getting it right that you're asking the actual values of C1 and C2?

(4) Are there any effects from Cc cap on the oscillation frequency?

There is.
Lower Cc will increase the loaded Q, but if it is too low, it may make the circuit not able to oscillate.
Remember the equation for the parallel resonator's frequency? The total capacitance seen by the inductor is (C2||(C1+Cstray)||Cc). See, the total capacitance won't go over Cc. It may single-handedly control the oscillation frequency.

 

[samy555]

Start with a ratio of 1. Increasing the ratio will lead to higher loaded Q but it will lower the loop gain at the same time. So if there are no oscillations, you ought to decrease the ratio.

I design this circuit with C2/C1 = 0.5
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First I design the Emitter follower (IC= 1mA, VCE= 1.5 half VCC), then I design the LC circuit, then I had to add a 4.9pF to make simulated frequency as calculation.
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For my design, can you please show me how "Increasing the ratio will lead to higher loaded Q AND lower the loop gain at the same time"?
I have read many books and articles talking about Q-factor, but I can not understand it from a practical perspective. Tell me what to measure in my circuit to notice the change in loaded Q? did you mean to make a bod plot to observe the bandwidth?

I'm not quite sure what you meant here. But as you can see, the signal is sampled from the emitter then fed back to the base.

I meant that how to benefit from transistor's datasheet to calculate the stray capacitance that must be added to the existing capacity for accurate frequency calculation?
thanks alot

The total capacitance seen by the inductor is (C2||(C1+Cstray)||Cc). See, the total capacitance won't go over Cc.

Are you sure!!! I think it equal [(C1 series C2)// Cstray] series Cc
correct me?