Using the 31kHz RC clock in a 12F683, can I run the CCP PWM such that the Period is 30.4Hz (2bits of Fosc concatenated with the 8 bits in PR2)? That is 31000/(4*255), which is a period of ~33ms?
If so, does than allow me to control the PW from (0/1024)*33ms to (1023/1024)*33ms using 8bits in CCPRL1 concatenated with CCP1CON<5:4>?
If so, does than allow me to control the PW from (0/1024)*33ms to (1023/1024)*33ms using 8bits in CCPRL1 concatenated with CCP1CON<5:4>?