;******************************************************************
;
org h'0004'
ISR_Vector
;
; save main program context
;
movwf W_ISR ; save W-reg |B?
swapf STATUS,W ; doesn't change STATUS bits |B?
movwf S_ISR ; save STATUS reg |B?
clrf STATUS ; force bank 0 |B0
movf FSR,W ; |B0
movwf F_ISR ; save FSR |B0
;
; test and clear CCP1 interrupt flag bit
;
btfss PIR1,CCP1IF ; CCP module interrupt? |B0
goto ISR_XIT ; no, branch, else |B0
bcf PIR1,CCP1IF ; clear CCP interrupt flag bit |B0
;
; setup next CCP1 pin transition and compare interrupt timing
;
btfsc CCP1CON,CCP1M0 ; is CCP1 pin hi or lo? |B0
goto Pulse_Lo ; lo, branch, else |B0
;
; pulse is hi so setup CCP1 to go lo on Pulse "on-time" match
;
Pulse_Hi
bsf CCP1CON,CCP1M0 ; setup CCP1 to go lo next match |B0
movf PulseLo,W ; |B0
addwf CCPR1L,f ; CCPR1L += (Pulse)%256 |B0
movf PulseHi,W ; |B0
skpnc ; |B0
incf PulseHi,W ; |B0
addwf CCPR1H,f ; CCPR1H += (Pulse)/256 |B0
goto ISR_XIT ; |B0
;
; pulse is lo so setup CCP1 to go hi on pulse "off-time" match
;
Pulse_Lo
bcf CCP1CON,CCP1M0 ; setup CCP1 to go hi next match |B0
movf PulseLo,W ; |B0
sublw low d'20000' ; |B0
skpc ; borrow? no, skip, else |B0
decf CCPR1H,f ; |B0
addwf CCPR1L,f ; CCPR1L += (Period-Pulse)%256 |B0
skpnc ; |B0
incf CCPR1H,f ; |B0
movf PulseHi,W ; |B0
sublw high d'20000' ; |B0
addwf CCPR1H,f ; CCPR1H += (Period-Pulse)/256 |B0
;
; restore main program context
;
ISR_XIT
movf F_ISR,W ; |B0
movwf FSR ; restore FSR |B0
swapf S_ISR,W ; |B0
movwf STATUS ; restore STATUS |B?
swapf W_ISR,f ; don't screw up STATUS |B?
swapf W_ISR,W ; restore W-reg |B?
retfie ; return from interrupt |B?