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dramrattan

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A program with 6 assembly instructions has to be executed on an 8 bit pipelined CPU. The CPU has a 6 bytes instruction pre-fetch Queue, which fetches the instructions and fills the pipeline
1] What would happen if the 5th instruction in the program is an unconditional jump / branch ?
2] Can the number of address lines for the CPUs be determined?
 

Sceadwian

Banned
Again, not enough information to answer your question, how many instructions does it take to execute the unconditional jump or branch and how long it takes to re-fill the pipline. If you want us to do your homework for you the least you should do is provide enough information to answer it.
 

dramrattan

New Member
Considering the PIC16F877:

All i understand is that an unconditional jump/branch takes two instructions instead of one. From reading up about prefetching with pipelining in microprocessors it causes stalling of the processor when a condition like this occur. Not to sure about determining the number of address lines.
 
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Sceadwian

Banned
It stalls until the instruction pipeline is filled, so however deep the pipeline is. I thought it was worked into the cycle count on the branch instructions.
 

dramrattan

New Member
Thanks i read something like what you mentioned but wasn't sure about what it was trying to explain but nevertheless i think i got the basic point about it.
 
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