cwt said:Sorry for not giving more information about my project.
Ok..my project work like this.
My project requires user to enter words into a textfile(eg. notepad) then the dot matrix display will read and show the appropriate output.
So is it necessary for me to write an interfacing program to handle that(convertion of each characters into equivalent group of bits)?
Currently i am collecting info and ideas on how to build my project without using a PIC. Even microcontroller is out of my plan! Am i possible to complete my project without using those?
cwt said:Resolution? You mean the design of dot matrix display? I plan to use 8x8 dot matrix display. Maybe i'll use 5 pieces of those. Are there any better suggestions?
My project didnt include the usage of PIC and microcontroller due to the fact that i want to build a circuit using all basic logic chips (eg. AND,OR,NOT) and shift registers. The reason behind is i hope my circuitry design can be dope into a single silicon chip. So that, in future (i hope) this will simplify the contruction of a LED dot matrix display system.
You said that you would like the circuit converted to a chip when it works. Do know that no company will make a chip specially for you, unless you're willing to pay enourmous amounts of money.
If you produce your project using a pic, and you need it mass produced you can always ask microchip to mask program pics with your code, it would be much cheaper...
I don't know whether it can use your simulation circuit.
It's the first bit that comes in after a pause. between every byte sent there is a little pause wich is detectable.cwt said:Thanks Exo!
But i still have some questions.
How am i going to detect the start pulse? And how am i going to ignore the stop bit?
Of course a timer can be constructed to generate 8 clocks and then stop, It's just adding some more logic chips to the pile you're already going to need. I don't have a circuit handy, I would need to design one and i don't have time for that, I use pic's to do things like this would solve the entire circuit in 1 day...cwt said:A timer circuit can be controlled to generate a desired number of pulses?! :shock: (eg. 8 pulses) All this while i though it can only used to generate a continuous pulse train. If can, can you provide me that timer circuit? Please... :cry:
cwt said:There is one thing i really want to be very sure. Its about the output of SIPO shift register. i know what are you talking about but i need to know how to extract the correct parallel bits. :?:
Is it there is a 'special' circuit behind the SIPO shift register before we can take the final parallel bits? :idea:
For example, if i had a serial bits of 10110000, where the leading 1 is MSB, going into the SIPO shift register. After 8 pulses, the output will be at the correct parallel bits, right? But before those 8 pulses, how am i going to managed all those 'incorrect' parallel bits? I think there should be a 'special' circuit behind the SIPO shift register that block all those incorrect bits, right? So that what we get at last is the correct parallel bits. Agree?
cwt said:I have some questions to ask about parallel out serial shift register.
If i am going to input a serial data (eg. 10110, where the leading 1 is a MSB and the last 0 is a LSB, into a SIPO shift register) how am i going to take the equivalent output from each of the output pins (eg. D0 = 0, D1 = 1, D2 = 1, D3 = 0, D4 = 1)?:roll:
How am i going to design a circuit to make sure that i extract the right parallel bits?? :?
cwt said:Exo said:If your timer circuit starts clocking 8 times right after the startbit and then stops then your shift register will have read the 8 databits, no incorrect bits will be read...
Erm..what i need to know is the output of the serial shift register. :?
How am i going to take the correct parallel bits out of the serial data? :?:
If 1011 0110 --> going into the shift register,
At first clock pulse, the SIPO output will be 0xxx xxxx.(where x is an unknow state)
At second clock pulse, parallel output is 10xx xxxx.
At third clock pulse, parallel output is 110x xxxx.
At fourth clock pulse, parallel output is 0110 xxxx.
.....
.....
At eighth clock pulse, parallel output is 1011 0110.
Agree with those?? :roll:
So if i want to make 1011 0110 parallel output available at the dot matrix array, what should i do to prevent those previous 7 incorrect parallel bits from entering the dot matrix column? Is it there should be a 'special' circuit that only allow the correct parallel bits to go through?? Will a D latch do the job?
I apologise if i have offended you. :cry:
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