I did mean opamp, not FET. Sorry for the confusion.
I think I've solved the mystery re the 0.9A minimum and the 280mV figures. I see from the datasheet that the minimum 'on' time of the LTC3623 is, by design, 30nS. That means the minimum duty cycle, with a 1uS period, is ~3% rather than the 0% you would need to get zero load current. The following simplified sim of the output of your circuit bears out both figures.
Reducing the PWM frequency should reduce the output current minimum.
That makes sense. Although, the behavior I observed was that the current bottoms out at 0.9A when the input is around 400 mV, not 280mV. But, that could probably be explained away by minor differences in component values and real-world effects not captured by the sim. I hope so anyway.
So, if I go the route of decreasing the PWM frequency, I imagine that would adversely affect the circuit's transient response. Do you concur? I'm not sure that's a bad thing for my application but I'm just trying to think through everything. Are there any other negative effects you can foresee?
I couldn't go too much lower on the PWM frequency. In my circuit it's fixed at 1 MHz and the minimum per the data sheet 400 kHz. If I went all the way down to 400 kHz, that would drop the duty cycle to ~1.2%. That probably still won't get me down to the 90 mA my application requires.
Another workaround I'm thinking of would be to place a MOSFET and a 1Ω resistor in parallel at the output between my circuit and the load. I would choose a MOSFET with a low R
DS ON and have it conducting most of the time effectively shorting past the 1Ω resistor. When the current requirement drops below 1A or so, I'll remove the command from the MOSFET and force the output of my circuit to pass through the 1Ω resistor effectively increasing the load resistance by 1Ω.
I think it'll work for my application because the current requirement is something that will change but it'll be very gradual and I shouldn't get into any cases in which I'm oscillating between having the MOSFET on and off. Do you see any red flags with that idea?
If I didn't do a good job of explaining it, let me know and I'll post a schematic.
Thanks for your help!
EDIT: Also, I forgot to ask. What are your thoughts on decreasing the size of the output capacitor?