Problems with design of a counter dependent voting machine

Hello,
I'm quite new in using digital circuits and also this is my first post.
I am preparing an electronic voting machine and there are problems I'm facing which need to to sorted out.
I'm attaching an image of the circuit that I'm currently using (a part only though, there are 2 such counter-decoder-display blocks attached with this section, as a combined 3 decimal digit counter)...simulation of this circuit in Proteus 7 is behaving wonderfully. But the project board simulation is erroneous.
This circuit is so designed that one can actually control the display by using SW2 in the circuit and SW1 is meant for assuring only one vote from one person. The main problems I face are-
Whenever the circuit is powered, the counter (and display) is actually showing some arbitrary digit. But I want it to start from 0
Whenever SW2 changes its state to enable the 74247 IC, the counter is actually adding some count (arbitrary though) which makes no sense!!!!

To be noted: 7490 and 74247 share the same Vcc and Gnd...and we still didnt use any resistor/capacitor things to fix any bias problems or such!!!!

First thing that comes to mind is switch "bounce". Google on "switch bounce" and you should find numerous discussions online about it. Very few mechanical momentary switches open and close their contacts cleanly. They tend to "chatter", producing multiple pulses out, which leads to numerous clocks at the counter.
Luck!
kenjj