• Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Problem in Process corner simulation using Cadence ADXL tool.

Alex_bam

New Member
Hello,
My question is related to CADENCE software simulation.
I am doing a process corner simulation of a simple inverter using ADXL in CADENCE. But the problems are:

1_ When I run only the nominal corner it simulates successfully as shown in the figure.

2-But when I add worse power /worse speed corner scenario for CMOS then individually it runs, however when I combine different corners (e.g. nominal, wort power, and worst speed scenarios) then it not simulating and showing a pending option [attached]. Moreover in remarks, it shows the following message:

net /Vin selected but not highlighted
net /Vout selected but not highlighted

To make it simple, individual corner simulation runs successfully but it does not simulate in the case of combined process corners. And I would like to simulate all the corners simultaneously so that I can compare my simulation result under different scenarios.


Can anyone have faced a similar problem or suggest to me possible ways to solve it?

Thanks.
 

Attachments

Latest threads

EE World Online Articles

Loading
Top