Internally, the 7490 consists of a divide-by-2 counter and a divide-by-five counter. The divide-by-two counter (A) has clock input "A" (pin 14) and its output is the QA output (pin 12). The input to the divide-by-five counter (B) is the clock input "B" (pin 1) and it has three outputs, QB, QC and QD (pins 9, 8 and 11, respectively). To operate it, you must connect QA (pin 12) to clock B (pin 1) and use all four outputs (pins 12, 9, 8 and 11) to drive a display or simply use the QD output (pin 11) as the divide-by-10 output to your next stage. The input to the decade counter would be clock input A (pin 14). For this counter to work, you must have all four reset/preset inputs (pins 2 & 3 for zero reset, pins 6 & 7 for nine preset) GROUNDED or taken to a logical LOW from some other logic circuit, as they are active HIGH inputs and if you leave them floating, the counter will lock up. Pins 4 and 13 are not internally connected to anything and are not used. Ground is on pin 10, Vcc is on pin 5.
If you are only using this chip for a decade divider (not driving a decoder/driver chip for a display) and you want a symmetrical decade output, you can put the divide-by-five section first and the divide-by-two section last by using pin 1 as the input, connecting pin 8 to pin 14 and getting your decade output from pin 12. YOU CANNOT DRIVE A DECODER/DRIVER AND DISPLAY IN THIS CONFIGURATION because it will give you a really screwy count sequence.
If you must use a ripple counter and need to conserve on space, you can get this same counter in dual form with the 74LS390. Also, try to use LS logic vs. straight TTL as it draws less power and is faster logic. There's also a larger selection of logic devices in LS and they're all pin-for-pin compatible and logic-compatible (with the exception of the 74123/74LS123.
Dean