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Pmos Inverter

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alphonsas

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can anyone give the inverter using only pmos?? does the depletion mode be present in the pmos transistor? i can give the nmos inverter--
nmos.JPG
also give the PMOS nand and nor gates.
 
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Is this college work?

We don't mind helping you but we won't do all of the work for you. Please post what you've already done including any ideas you've had and we might be able to make some suggestions. If you've got completely no idea then may be it's your lecuturer's fault and it isn't right that you make him/her look good by cheating and copying from the Internet.

Like I say, I don't mind helping you so I'll give you a hint, look at the NMOS inverter and reverse the power supply connectiions.
 
not a college work

no...its not a college work. i just had this doubt while studying .and i need to draw those inverters and nand gates to draw the stick diagrams in pmos technology. So, please give me those circuit diagrams and my exams are fast approaching.
also explain the depletion mode in pmos transistor.
thanks
 
Depletion P-channel Mosfets were used in Mos ICs about 30 years ago. Now everything Mos is enhancement and is complementary.

It is too bad that your studies are far out of date.
 
of course not. The topic is just a part of the subject. since the topic was out dated it is getting hard to find a reference. Our learning begins with the beginning of the vlsi technology. So, its not a surprise if we find some outdated topics in our vast syllabus.

Cant we find an answer to the pmos inverter though it is outdated?
 
History?
My ancestors wrote with a chisel and a stone. I didn't.
They rode animals. I didn't.
They froze in winter and got hot in summer. I don't.
They used Pmos inverters. I never did.
 
good joke.

but u learnt the history. using is different from learning right?

anyway i derived the pmos nand and invert gate...pmos itself produces invert output at the drain. but please would u tell the workin of pmos in depletion mode?
 
alphonsas said:
please would u tell the workin of pmos in depletion mode?
A Pmos depletion mode transistor conducts fully when its gate is at the same DC voltage as its source. It is cutoff when its gate is more positive than its source.

Look up the circuit from the datasheet of a clock IC from a cheap clock radio. They still use old Pmos but I don't know if it is depletion or enhancement.
 
Maybe I missed the question.
An inverter, AND gate etc can be built using P-MOS, N-MOS, PNP or NPN, vacuum tubes, relays and more. Moving from NMOS to PMOS is the same as moving form NPN to PNP. Dray the NMOS, turn the page upside down, change the +5 volts to ground and the Ground to +5, Change N to P.
 
Here is a 2 input gate. Input A, Input B and OUT.
One is made with NMOS and the other made with PMOS.
The resistor can be a resistor or a MOS transistor.
 

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Depletion mode Pmos transistors need to have their gate voltage more positive than their source voltage for them to turn off.
Both your transistors are always turned on so they are killing themselves and the power supply.
 
You can use an enhancement mode PMOS as the load resistor in your inverter if you have a negative voltage to connect to the gate.
 
audioguru said:
Depletion mode Pmos transistors need to have their gate voltage more positive than their source voltage for them to turn off.
Both your transistors are always turned on so they are killing themselves and the power supply.
I'm thinking those are supposed to be enhancement mode transistors in the schematic posted by ronsimpson.
 
I was talking about the inverters by the OP.
 

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In the circuit on the left, the driven transistor is enhancement mode, and the load transistor is depletion mode.. This needs to be the case in the circuit on the right also, and I think that was the OP's intent. I assume PMOS depletion mode devices can be fabricated, but I have not seen one.
 
The OP is studying old stuff. Some worked and some didn't. Why is he looking at old stuff?
 
this is an enhancement mode pmos....by the property of the pmos when the input voltage is high the o/p at the drain is low. So by that the circuit looks like this but where should the gnd be taken??

pmos.JPG
 
alphonsas said:
this is an enhancement mode pmos
You don't know a Pmos from an Nmos and you don't know an enhancement one from a depletion one.

Learn electronics properly or take up gardening instead.
Your teacher should quit teaching.
 
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