PIC18F4550 Frequency of Oscillation Question

[Micro9900]

Hey guys, I looked over the data sheet and I found some sample code for what I believe is the proper configuration to have the microcontroller oscillate at 48MHz.

Hardware set up:

I have a 20MHz crystal oscillator connected across pin 14 (OC1) and 13 (OC2). Then, I have two ceramic 22pF capacitors going from each pin to ground.

**broken link removed**

The configuration using MPLAB C18 (for programming in C)

#pragma config PLLDIV   = 5         // 20Mhz external oscillator
#pragma config CPUDIV   = OSC1_PLL2 //determines frequency division  
#pragma config USBDIV   = 2         // Clock source from 96MHz PLL/2
#pragma config FOSC     = HSPLL_HS

Basically my question are as follows:
__________

1. Are the connections right?
2. Are the components (crystal and capacitor) correct?
3. If I have delays set for 1MHz FOSC, will I now have to adjust for 48MHz?
4. Do I need to further configure pins 14 (RA6/OC1) and pin 13 (RC0)?

The main reason for all of this is that I would like to increase the range of delays I can apply, since devices such as the DS18B20 temperature controller requires 1uS delays. Additionally, I may look into USB communication (I found a tutorial), and I would like to have this feature working. Any help in this matter is greatly appreciated. Thank you.

EDIT:
I have an LED connected and I am able to get it to blink when I use the following configuration:

#pragma config WDT=OFF, LVP=OFF, DEBUG=ON, MCLRE = ON
 
//Internal oscillator, port function on RA6, EC used by USB 
#pragma config FOSC = INTOSCIO_EC //1MHz oscillation

But, nothing happens (not even a flicker) when I run this code:

//turns watch dog timer off, turn low voltage programming off
#pragma config WDT=OFF, LVP=OFF, DEBUG=ON, MCLRE = ON
 
//oscillator configurations see pg. 25 /430 of pic18f4550 data sheet
#pragma config PLLDIV   = 5         // 20Mhz external oscillator
#pragma config CPUDIV   = OSC1_PLL2 //determines frequency division  
#pragma config USBDIV   = 2         // Clock source from 96MHz PLL/2
#pragma config FOSC     = HSPLL_HS

#include <p18f4550.h>
#include <delays.h>
 
//Power LED (PortA)
#define LEDPin LATAbits.LATA0 //Define LEDPin as PORT A Pin 1

void main()
{
	while(!OSCCONbits.IOFS);      //wait for osc stable
   	ADCON1 = 0x0F;                //make RA0 digital
 
        //data direction registers all 0's mean that all pins are set to output
	//all 1's means that all of the pins are set to operate as inputs
	TRISA = 0x00;  
	TRISB = 0x00;
	TRISC = 0x00; 
	TRISD = 0x00;
	TRISE = 0x00;

        while(1)
	{
			LEDPin = ~LEDPin;//Toggle LED Pin
			//Delay 250K cycles (1 second at 1MHz since each instruction takes 4 cycles) should blink faster now
			Delay10KTCYx(25);

         }//end main while loop        
}

 

[atferrari]

Look into the specs

Look into the specs for the PLL .

There you should find the value (max - min) of the crystal that you could use to be multiplied *4 to finally get what you want. Most common 4 to 10 MHz.

If I recall right, that limit of 48MHz was valid within a limited temperature range.

 

[Micro9900]

The tutorial here recommends a 20MHz crystal: https://www.waitingforfriday.com/index.php/Building_a_PIC18F_USB_device

The calculations, I believe are correct. Hmm, I'm not too sure what the problem could be... The only difference is that I am using a 22pF capacitor instead of a 15pF capacitor (I hope that's not the problem).

From data sheet:

...It is designed to produce a
fixed 96 MHz reference clock from a fixed 4 MHz input.
The output can then be divided and used for both the
USB and the microcontroller core clock.

So, using 20MHz and a PLLDIV=5 results in 4MHz (20/5)

Here is a better description of the configuration:

FOSC = HSPLL_HS                 //HS with PLL enabled 
PLLDIV = 5	                            //PLL prescaler 20/5=4 MHz (96MHz PLL needs 4 MHz from prescaler)
config CPUDIV = OSC1_PLL2  // PLL divided by 2 (96/2=48MHz) 
config USBDIV = 2	           //if full speed (FSEN=1) USB is fed by PLL

Also, found some info on the capacitor:

...Higher capacitance increases the stability
of oscillator but also increases the
start-up time.

EDIT:

I tried this:

#pragma config WDT=OFF, LVP=OFF, DEBUG=OFF, MCLRE = ON
#pragma config FOSC = INTOSCIO_EC 
void main()
{
...
	OSCCONbits.IRCF2 = 1;
	OSCCONbits.IRCF1 = 1;	
	OSCCONbits.IRCF0 = 1;
...
}

With the above snippet of code, I am able to have the internal oscillator at 8MHz. But, I am still a bit confused as to why the internal oscillator did not change to 4MHz and instead seemed to have not worked at all when I was using the previous bit of code. Either way with the OSCCON bits specified doesn't affect the other configuration, which sets FOSC = HSPLL_HS. So, the previous bit of code still doesn't work even when configuring OSCCON bits.

 

[atferrari]

Maybe here...

Would this help you?

https://www.mikroe.com/forum/viewtopic.php?t=10646

Post the outcome, please.

 

[Micro9900]

Thank you for the response, but I'm not too sure what I should change from the link posted above. I'm using MPLAB, so I know the code that I posted above is acceptable in terms of syntax and use of variables. I'm not sure if I need to set the OSCCON bits to match the 4MHz as well? What if I wanted 8MHz instead?

EDIT:

PLL Prescaler (see Datasheet->Figure 2-1) will then divide 20MHz by 5 and produce 4MHz (needed on 96MHz PLL input).

If you choose HSPLL oscillator (check _FOSC_HSPLL_HS_1H flag, uncheck _FOSC_INTOSC_HS_1H and _FOSC_HS_1H if checked)

In this case CPU will use 96MHz HSPLL divided by PLL Postscaller, set CPUDIV flags to choose the divider.
_CPUDIV_OSC1_PLL2_1L will divide 96MHz by 2 and CPU will get 48MHz [you need to set Clock field in EditProject to 48MHz]
...
_CPUDIV_OSC4_PLL6_1L will divide 96MHz by 6 and CPU will get 16MHz [you need to set Clock field in EditProject to 16MHz]
Note: PLLx part of the flag is relevant, ignore the OSCx part of the flag

Unfortunately, this what I have already posted:

FOSC = HSPLL_HS                 //HS with PLL enabled 
PLLDIV = 5	                            //PLL prescaler 20/5=4 MHz (96MHz PLL needs 4 MHz from prescaler)
config CPUDIV = OSC1_PLL2  // PLL divided by 2 (96/2=48MHz) 
config USBDIV = 2	           //if full speed (FSEN=1) USB is fed by PLL

EDIT: It could be the capacitors I am using I try to order some 15pF caps and see if it affects the circuit. I'll post back if it works or fails. But again, thank you for the responses.