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Pic18f4550 adc

Discussion in 'Microcontrollers' started by adrianvon, Jan 11, 2012.

  1. adrianvon

    adrianvon Member

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    Hi all,
    I am doing an analog to digital program. The analog input is set to AN0 and the digital output is port D. The program worked, but bit 7 is starting from bit 3 i.e. shifted by 4 bits (see attached pic). Does someone know what is causing this? The coding is set to left justified since i only need to use the first 8bits.

    Below is the coding:

    Code (text):
    ;REGISTER DECLERATIONS

    REG1 EQU 60H ; HERE WE ARE NAMING THE GENERAL PURPOUSE REGISTER


    ORG 0000H

    ;ALL INTIALIZATION HERE OF ALL PORTS AND PERIPHERALS HERE

    MOVLW B'00000001' ; SET AN0 AS ANALOG INPUT AND SWITCH ON ADC MODULE
    MOVWF ADCON0

    MOVLW B'00111110' ;SET AN2 AND AN3 AS REFERENCE VOLTAGES, AND SET AN0 AS ANALOG INPUT
    MOVWF ADCON1

    MOVLW B'00101100' ;SET AS LEFT JUSTIFIED, SET AS 12 TAD, SET AS FOSC/4
    MOVWF ADCON2

    CLRF PORTD ;DECLARE PORT D AS OUTPUT FOR THE DIGITAL OUTPUT
    CLRF TRISD


    MOVLW B'111111' ;DECLARE PORT A AS INPUT FOR THE ANALOG INPYT
    MOVWF TRISA

    ;START MAIN PROGRAM HERE


    MAIN


    CALL ACQ_DELAY ;CALL DELAY
    BSF ADCON0,1 ; CONVERSION IN PROCESS (START CONVERTING)
    LINE1
    BTFSC ADCON0,1 ;check if ADCON0 bit 1 if clear,if yes skip the next instruction
    BRA LINE1
    SWAPF ADRESH,W ;MOVE VALUE FROM AN0 TO WORKING REGISTER
    MOVWF PORTD  ;MOVE VALUE IN WORKING REGISTER TO PORTD
    GOTO MAIN  

    ACQ_DELAY
    MOVLW .3
    MOVWF REG1
    ACQ1
    DECFSZ REG1
    BRA ACQ1
    RETURN     


    END_OF_PROGRAME
     
    And can someone explain to me what exactly T[SUB]AD[/SUB] means and how to determine which one to use?? and how to determine the conversion clock select bit? (see attached pic)

    Thanks in advance,
    Adrian
     

    Attached Files:

  2. Gobbledok

    Gobbledok Active Member

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    Hi Adrian,

    I have no idea why your result is shifted but I can hopefully explain what TAD and the conversion clock are.

    TAD is your A/D converter clock source. If your TAD (AD Clock source) is too fast, then you will have inaccuracies in the last few bits of your conversion. If your TAD is too slow, then the internal sample-and-hold capacitor will slightly discharge before the conversion is completed, resulting in a lower reading than it should be.

    So 1TAD is one cycle of the AD Clock and therefore 20TAD is 20 cycles of the AD Clock. The conversion internally takes 12 cycles (12 TAD) to complete. There are minimum TAD times for AD modules also.

    You can work out your TAD based on your AD Clock source. For example a PIC32MX has a minimum TAD time of 83.3ns which is equal to a 12MHz AD Clock source.

    Just a little on the acquisition time too... If your acquisition time is too short, or your input resistance too high, then the internal sample-and-hold capacitor will not have enough time to completely charge, resulting in a lower than normal reading. The acquisition time is a function of the input resistance and the internal capacitance.

    HTH.
     
    Last edited: Jan 11, 2012
  3. adrianvon

    adrianvon Member

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    Thanks for explaining Gobbledok :)
     
  4. dave

    Dave New Member

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  5. ericgibbs

    ericgibbs Well-Known Member Most Helpful Member

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    hi
    Check what the swapf instruction is doing.
     
  6. Ian Rogers

    Ian Rogers Super Moderator Most Helpful Member

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    That was a good spot Eric..... I've looked at the code several times....
     
  7. adrianvon

    adrianvon Member

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    Hi,

    Thanks for your reply.
    I changed the coding as the one below and it worked.

    Code (text):
    ;REGISTER DECLERATIONS

    REG1 EQU 60H ; HERE WE ARE NAMING THE GENERAL PURPOUSE REGISTER
    ADC EQU 61H


    ORG 0000H

    ;ALL INTIALIZATION HERE OF ALL PORTS AND PERIPHERALS HERE

    MOVLW B'00000001' ; SET AN0 AS ANALOG INPUT AND SWITCH ON ADC MODULE
    MOVWF ADCON0

    MOVLW B'00111110' ;SET AN2 AND AN3 AS REFERENCE VOLTAGES, AND SET AN0 AS ANALOG INPUT
    MOVWF ADCON1

    MOVLW B'00101100' ;SET AS LEFT JUSTIFIED, SET AS 12 TAD, SET AS FOSC/4
    MOVWF ADCON2

    CLRF PORTD ;DECLARE PORT D AS OUTPUT FOR THE DIGITAL OUTPUT
    CLRF TRISD


    MOVLW B'111111' ;DECLARE PORT A AS INPUT FOR THE ANALOG INPYT
    MOVWF TRISA

    CLRF ADC ;CLEAR REGISTER ON START UP ONLY

    ;START MAIN PROGRAM HERE


    MAIN


    CALL ACQ_DELAY ;CALL DELAY
    BSF ADCON0,1 ; CONVERSION IN PROCESS (START CONVERTING)
    LINE1
    BTFSC ADCON0,1 ;check if ADCON0 bit 1 if clear,if yes skip the next instruction
    BRA LINE1
    MOVFF ADRESH,ADC ;MOVE VALUE FROM AN0 TO ADRESH REGISTER
    MOVFF ADRESH,PORTD  ;MOVE VALUE FROM ADRESH REGISTER TO PORTD
    GOTO MAIN  

    ACQ_DELAY
    MOVLW .3
    MOVWF REG1
    ACQ1
    DECFSZ REG1
    BRA ACQ1
    RETURN     


    END_OF_PROGRAME
     
     
  8. ericgibbs

    ericgibbs Well-Known Member Most Helpful Member

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    hi adrian,
    Did you try just.??
    movff ADRESH,PORTD
     
  9. adrianvon

    adrianvon Member

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    No but i will try it.

    Can i set the +ve reference temperature (pin 5) to a voltage of more than 5V ?? or will i damage the PIC if i increase it more than 5V??

    Thanks
     

    Attached Files:

    Last edited: Jan 11, 2012
  10. adrianvon

    adrianvon Member

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    I tried it with movff ADRESH,PORTD and its working fine.

    Can i use MOVFF for the register decelerations as well ?? for instance instead of writing:

    Code (text):
    MOVLW B'00000001'
    MOVWF ADCON0
    can i write:
    Code (text):

    MOVFF B'00000001'. ADCON0
     
  11. Gobbledok

    Gobbledok Active Member

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    Hi Adrian,

    Generally VDD (or AVDD) is the upper limit for Vref+. You can damage the PIC by using a higher voltage.
     
  12. adrianvon

    adrianvon Member

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    Hi,

    Thanks for the reply. Since i cannot increase the ref voltage above 5V, is it possible to set the ADC to 7 bits instead of 8 Bits?? The reason for this is that i want to represent 128 bits for an analog input which will vary from 0V to 4000mV (i.e. 31.25mV = 1 bit)

    The diagram below may help you understand what im trying to do.

    Thanks
     

    Attached Files:

    Last edited: Jan 11, 2012
  13. Gobbledok

    Gobbledok Active Member

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    Yeh sure. Just shift your AD Result right until you have the 7 upper bits.

    So for a 10-bit A/D shift right 3 times and you are left with a 7-bit result.

    Dividing your 10-bit result by 8 will do the same thing (or divide your 8-bit result by 2).
     
    Last edited: Jan 11, 2012
  14. adrianvon

    adrianvon Member

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    Good idea...

    Can i divide using assembly? if yes, do you know the instruction set please?

    Thanks in advance
     
    Last edited: Jan 11, 2012
  15. Gobbledok

    Gobbledok Active Member

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    'RRF' will shift right and divide by 2 every time you shift.
     
  16. adrianvon

    adrianvon Member

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    Thanks for the reply Gobbledok :) it will try it tomorrow.
     
  17. Gobbledok

    Gobbledok Active Member

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    Actually you need 'RRNCF' - Rotate Right (No Carry).
     
  18. ericgibbs

    ericgibbs Well-Known Member Most Helpful Member

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    hi,
    No, movff reg1,reg2 ; is a Register Contents move, not a Literal.

    Your MOVFF B'00000001', ADCON0;, would move the Contents of B'00000001 Register to ADCON0
     
    Last edited: Jan 12, 2012
  19. adrianvon

    adrianvon Member

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    Hi,

    But if i use RRF instruction, the resolution (steps) would not decrease from 256 to 128 ?? an i right?
     
  20. adrianvon

    adrianvon Member

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    Hi,

    Ok, thanks for explaining :)
     
    Last edited: Jan 12, 2012
  21. adrianvon

    adrianvon Member

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    RRF is not being recognized as an instruction. I thing its RRCF.

    Can someone help me in using this instruction to set the ADC to 7 bit please ?? i tried several times but its still not working. I think im using the RRCF instruction incorrectly...

    Thanks
     
    Last edited: Jan 12, 2012

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