start bcf STATUS,RP0
bcf STATUS,RP1 ;BANK0
bcf INTCON,GIE
bsf STATUS,RP0 ;BANK1
movlw 0x00
movwf TRISA
movwf TRISB
movwf TRISC
movwf TRISD
movwf TRISE
movlw 0x00
movwf SPBRGH
movlw 0x27 ;0x27=39(dec) for 18.432 MHz crystal with 0% error!!
movwf SPBRG ;0x2A(42 dec) for 20 MHz with 0.94% error.
movlw b'00100100'
movwf TXSTA
bsf STATUS,RP0
bsf STATUS,RP1 ;BANK3
movlw b'00001000'
movwf BAUDCTL
movlw 0x00
movwf ANSEL
movwf ANSELH
bcf STATUS,RP0
bcf STATUS,RP1 ;BANK0
movlw b'10010000'
movwf RCSTA
clrf PIR1
bsf STATUS,RP0 ;BANK1
bsf PIE1,RCIE ;ENABLE INTERRUPT ON RECEIVE
bcf STATUS,RP0 ;BANK0
bsf INTCON,PEIE ;enable Peripheral interrupts
bsf INTCON,INTE ;enable RB0/INT interrupts
bsf INTCON,GIE