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PIC Interupt LESS Hardware?

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AGCB

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I'm learning PICs. After having done a single interupt, before moving on to something else, I decided to try a multiple interupt. The code and circuit work. My question is, "Can this be made to work with less hardware? Can software be substituted for any of the hardware in this circuit using this 16F84A. If I can learn an easier way, I would like to try it. Thanks for taking a look!
Aaron
 

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Your program could be simplified enormously by simply polling the inputs.

and the delay can be simplified to this as the files enter the sub-routine with 00 after the first execution:

Code:
_250mS	nop
	decfsz 	temp1,f
	goto 	$-2
	decfsz 	temp2,f
	goto 	$-4	
	retlw 	00	

_500mS  call    _250mS
        call    _250mS
        retlw 	00
 
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The pic can be programmed to generate an interrupt on portB change. This would make all portB inputs generate an interrupt and would allow you to remove the external logic gate.
 
My question is, "Can this be made to work with less hardware? Can software be substituted for any of the hardware in this circuit using this 16F84A. If I can learn an easier way, I would like to try it.
Aaron
That depends. Why are you using a flip-flop? Using a flip-flop suggests you want to latch and hold these two signals when a clock edge occurs at a critical moment. And you wired the 7400 to be an XOR (exclusive OR) gate. This means you get a low output (which becomes an interrupt) when both flip-flop outputs are the same level, high or low.

If the A1 and A2 signals last long enough, you can get rid of the flip-flop and 7400. The circuit could be just the PIC using the flip-flop's present clock signal to start an interrupt at the PIC. If this is low-going, use RB0. If you want to fire on a high, use one of the interrupt-on-change pins. The first thing you do in the interrupt routine is read two pins with the A1 and A2 signals. Then you do a comparison asking if the two signals are the same logic level (which is what an XOR gate does) and process accordingly. If the same level, do this; if not, do something else.
>If they don't last long enough, then you must use the flip-flop to latch the two signals so they are still available to the PIC to read later. You can still use the same clock to interrupt the PIC.
>The next consideration is response time. Can you afford the clock cycles the PIC needs to read and determine signal levels? If not, the next question is, do you need to know what level the signals are at? If you use the XOR gate, you can interrupt using that, knowing it has already determined that the signals are the same level. If you don't need to know the levels, you can react instantly and do something in that case. Otherwise you have to take the time to read the levels and react accordingly.

Hope that helped.
kenjj
 
Diode ORing can be used for Interrupts from multiple inputs. If you don't care which signal triggered the interrupt just diode OR all the inputs to the one interrupt input. If you do care, you will need N+1 inputs, where N in the number of potential interrupt signals. Each signal goes to an input and also is diode-OR'd to your interrupt input. Once the interrupt happens you scan at the inputs to see which triggered the interrupt. But, this assumes the signals are present long enough, as kjennejohn said.

Ken
 
Thanks for the replies. I will try some of the code changes to see how they work and any differences.

The F-F was used to latch a short pulse on the input.

My reason for the XOR was to isolate the INT pin from the other inputs. It is just what I had in my junkbox to do it with.

I had considered diodes but there are two different iserv routines and I couldn't figure out how to keep one input from affecting the other.

Since I'm using all the portB pins except INT for output, that left only portA for inputs.

Your time in replying is appreciated. Aaron
 
If you require two edge triggered interrupts then, obviously, B0 is one of them and RA4 can be used as the other. The way you do this is by setting up timer0 to clock from RA4 and setting it's value to 0xff. When ever a clock pulse arrive a timer0 interrupt will occur. The timer0 clock polarity can be selected as rising or falling edge.

Mike.
 
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