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PIC I2C Timing

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micropad

Member
Dear All,
This is related to PIC 16f877a SSP I2C Master mode configuration

As per the attached picture, it shows BRG value start from 03h and it is time out 00h.
Can you please explain , what is the relation ship between ADDRES value and BRG start value.

i2c brg.jpg

Please advice
Thanks in advance
 

micropad

Member
Dear Ian Rogers

Great thanks for reply

As per the PICmicro™ Mid-Range MCU Family Reference Manual
it shows
Baud Rate Generator
In I2C master mode, the reload value for the BRG is located in the lower 7 bits of the SSPADD
register (Figure 17-18). When the BRG is loaded with this value, the BRG counts down to 0 and
stops until another reload has taken place. In I2C master mode, the BRG is reloaded automatically.
If Clock Arbitration is taking place for instance, the BRG will be reloaded when the SCL pin
is sampled high (Figure 17-19).

Could you please guide me
Thanks in advance
 

Pommie

Well-Known Member
Most Helpful Member
BRG stands for Baud Rate Generator and is not to be confused with SPBRG. The BRG is an internal circuit that is used to divide down the master oscillator to clock the I2C module. If you check the table of "Registers Associated with SPI Operation" you will see that BRG isn't one of them.

Mike.
 

micropad

Member
Dear Mike, Thanks for the reply

1.What I got from your reply is, The value load to ADDRES register depend on the SCL frequency in the I2C master configuration

2. could you please explain, what should be the value start count down in the picture my first post

This is I found from the Manual

To initiate a START condition the user sets the start condition enable bit, SEN (SSPCON2<0>).
If the SDA and SCL pins are sampled high, the baud rate generator is re-loaded with the contents
of SSPADD<6:0>, and starts its count. If SCL and SDA are both sampled high when the baud
rate generator times out (TBRG), the SDA pin is driven low. The action of the SDA being driven
low while SCL is high is the START condition, and causes the S bit (SSPSTAT<3>) to be set. Following
this, the baud rate generator is reloaded with the contents of SSPADD<6:0> and resumes
its count. When the baud rate generator times out (TBRG) the SEN bit (SSPCON2<0>) will be
automatically cleared by hardware, the baud rate generator is suspended leaving the SDA line
held low, and the START condition is complete.

please advice
thanks in advance
 
Last edited:

Pommie

Well-Known Member
Most Helpful Member
Why are you worried about how it works? Just accept the fact that it works and use it.

Mike.
 

micropad

Member
Hi wp100

Thanks for the reply,
I red the all tutorials that you provided. I did not find the expected reply
I think it should be think from PIC architecture
What do you think

Can you please advice me, what is the most suitable I2C hardware debugger that I need to signal patents

Thanks in advance
 

micropad

Member
Dear Rogers Thanks for the reply

Actually I need is to check hardware level signal transition
Ex.
I am working with RTC DS1307 and PIC16f877a and reading time while updating to the LCD. Now it is working well.

So I need to debug and see how signals are communicating among the devices. I tried to do this using my own design PICkit2 + MPLAB( PICkit2 clone) but it did not success.
Could you please guide me what are the available low cost MICROCHIP product that I can purchase for hardware level debugger

Please advice
Thanks in advance
 

Ian Rogers

User Extraordinaire
Forum Supporter
Most Helpful Member

micropad

Member
Dear Rogers
It is nice Protocol Analyzer, and I watched video too, I think It does not support for debugging like oscilloscope
 
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