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PIC code problem

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Gaston

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i am useing a ucn5804b stepper comtroller controlled by a pic. i modified nigle's tutrial with the table to generat the pulses and the reverse forward bit. i amd using bit 1 for the pulses and bit 2 for the reverse forward. i made one table for forward and one for reverse. the problem is that the forward table completes which is about 120 degrees but the reverse table ony goes to about 80 degrees. could someone look at the code and see if there is anything i am doing wrong?

Code:
 LIST p=16F628  ;tell assembler what chip we are using
 include "P16F628.inc"  ;include the defaults for the chip
 __config 0x3D18   ;sets the configuration settings (oscillator type etc.)
 cblock  0x20    ;start of general purpose registers
  count   ;used in table read routine
  count1    ;used in delay routine
  counta    ;used in delay routine
  countb    ;used in delay routine
 endc
 LEDPORT Equ PORTB  ;set constant LEDPORT = 'PORTB'
 LEDTRIS Equ TRISB  ;set constant for TRIS register
 
 org 0x0000   ;org sets the origin, 0x0000 for the 16F628,
     ;this is where the program starts running 
 movlw 0x07
 movwf CMCON   ;turn comparators off (make it like a 16F84)
    bsf  STATUS,  RP0 ;select bank 1
    movlw  b'00000000'  ;set PortB all outputs
    movwf  LEDTRIS
 bcf STATUS,  RP0 ;select bank 0
 clrf LEDPORT   ;set all outputs low
  ;forward
Start clrf count   ;set counter register to zero
Read movf count, w  ;put counter value in W
 call Table 
 movwf LEDPORT
 call Delay
 incf count, w
 xorlw d'148'   ;check for last (14th) entry
 btfsc STATUS, Z
 goto Start2   ;if start from beginning
 incf count, f  ;else do next
 goto Read
  ;reverse
Start2 clrf count   ;set counter register to zero
Read2 movf count, w  ;put counter value in W
 call Table2 
 movwf LEDPORT
 call Delay
 incf count, w
 xorlw d'148'   ;check for last (14th) entry
 btfsc STATUS, Z
 goto Start   ;if start from beginning
 incf count, f  ;else do next
 goto Read2
Table ADDWF   PCL, f   ;data table for bit pattern
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 12
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 24
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 36
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 48
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 60
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 72
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 84
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 96
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 108
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 120
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 132
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'
  retlw b'00000001'
        retlw   b'00000000'
        retlw   b'00000001'
        retlw   b'00000000'
  retlw   b'00000001'
  retlw   b'00000000'  ;12 lines 144
      retlw b'00000000'  ;reverse delay
  retlw b'00000000'
  retlw b'00000000'  
  retlw b'00000000'  ;148 lines
Table2 ADDWF   PCL, f 
  retlw b'00000011'  ;reverse
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 12
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 24
  retlw b'00000011'  
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 36
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 48
  retlw b'00000011'  
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 60
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 72
  retlw b'00000011'  
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 84
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 96
  retlw b'00000011'  
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 108
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 120
  retlw b'00000011'  
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 132
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'
  retlw b'00000011'
        retlw   b'00000010'
        retlw   b'00000011'
        retlw   b'00000010'
  retlw   b'00000011'
  retlw   b'00000010'  ;12 lines 144
  retlw b'00000000'  ;reverse delay
  retlw b'00000000'
  retlw   b'00000000'
  retlw b'00000000'  ;148 lines
 
 
Delay movlw d'20'   ;delay ? ms (4 MHz clock)
 movwf count1
d1 movlw 0xC7
 movwf counta
 movlw 0x01
 movwf countb
Delay_0
 decfsz counta, f
 goto $+2
 decfsz countb, f
 goto Delay_0
 decfsz count1 ,f
 goto d1
 retlw 0x00
 end
 
Last edited:
Gaston

Add a [code ] to the top and a [/code ] to end of the code with edit. With no spaces in them.
 
Your second table crosses a page boundary. Try inserting the following line,
Code:
	retlw b'00000000'  ;148 lines

	org 0x200;   <---------------     insert this line.

Table2	ADDWF   PCL, f

You might also want to read the datasheet where is explains computed GOTOs.

HTH

Mike.
 
I inserted the line but now it goes forward pauses and then goes forward again. i read the datasheet on the 16f628b but didn't see where it explained goto other that just saying what it does and the syntax.is there another data sheet
 
Sorry, I didn't notice that you don't setup PCLATH. You should add the following lines,
Code:
	clrf LEDPORT   ;set all outputs low
  ;forward
	movlw	high(Table)	; <------------added
	movwf	PCLATH		; <------------added
Start	clrf count   ;set counter register to zero
Read	movf count, w  ;put counter value in W
	call Table 
	movwf LEDPORT
	call Delay
	incf count, w
	xorlw d'148'   ;check for last (14th) entry
	btfsc STATUS, Z
	goto Start2   ;if start from beginning
	incf count, f  ;else do next
	goto Read
  ;reverse
Start2	movlw	high(Table2)	; <------------added
	movwf	PCLATH		; <------------added
	clrf count   ;set counter register to zero
Read2	movf count, w  ;put counter value in W
	call Table2 
	movwf LEDPORT
	call Delay

The section in the data sheet where it explains computed gotos is section 4.3.1 on page 28.

HTH

Mike.
 
thanks for pointing out where to look in the datasheet. i don't understand what is meant by (pc<12:8>). or where it says the pc is 13 bits wide, but it refers to a high byte and low byte. but two bytes would be 16 bits. then it says that onlt the lower byte can be written to or read. so that means you can only have 256 lines? or is that where the the other 5 bits are for.
 
i just added those lines and it works perfectly. thanks a lot. now i just need to study the datasheets to learn why it works : )
 
Whenever you write to PCL, PCLATH gets copied into the high byte of the program counter. The write to PCL in table2 therefore jumped to location 0 because PCLATH hadn't been setup.

Mike.
 
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