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PIC ADC impedance loading

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Mosaic

Well-Known Member
Hello,

16F882 datasheet specs 10K as max rec. source impedance for the ADC. Also it specs the leakage current as 0.5uA.
With a 5V max input that makes the DC impedance 10Mohms. Thus the 10K limit for a DC analog signal is established by the TAD and not sampling errors due to loading?

Is this reasonable?

thx
 
I think that if you hang a suitable capacitor across the ADC input, then you can have slowly varying inputs that come from a source impedance of much higher than 10kOhms. The sampling error comes from charging the internal capacitors. If you store charge on the input pin it will be less effected as the internal capacitors are switched.
 
As Mike has pointed out, the main errors come from charging and discharging the internal sample and hold capacitor, as long as you allow time for that to happen it's not at all critical.

Also, if you're only using one ADC input, and it's permanently enabled, there's little problem - it's switching between them that causes the main errors.

Try an experiment:

Write a program to display two ADC inputs on an LCD, switching as fast as you can between the inputs (allowing the minimum conversion time).

Connect the sliders of two 4.7K pots to each input, and the other ends to Vss and Vdd.

Now alter the pots while you watch the display, each should only alter it's own reading.

Now add 100K resistors between the ADC's and the sliders, and repeat.

You'll now see that each pot affects both readings - a LOT.

This is because the capacitor doesn't have time to charge/discharge.

Now add longer time delays between selecting the input and taking the reading, make them long enough and the pots won't interact any more.
 
To take Nigel's experiment a little further, try putting a delay between each read and the pots will swap over as the capacitor is still charged from the previous pot. Note, leave the ADC enabled and when reading just select the channel and do the conversion.

Mike.
 
This is a simulation modelled on the PIC's ADC circuitry.
It shows the rise/fall times of the voltage on the internal 120pF cap, when changing the external source impedance.
 

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