Hi,
Have not been able to grasp all the detail of the Adcon2 statement despite much searching and reading, including an ET topic last month - hope someone could help please.
I'm using the 18F2520/4520 chips with an internal osc at 4meg.
The Adc inputs are direct ntc and amplified signal inputs to ra0 and ra1.
For the ADCS Clock conversion bits 0-2, I can see that these should be set to Fosc/4 = 100
I can see that the ACQT Acquisition time bits need to be set to a specific value, but what ?
Should it be something like if Tad needs to be at least 2.4us, then the ACQT number of Tads is the number of tads times the ADCS frequency to give 2.4us ?
thanks
Richard
Have not been able to grasp all the detail of the Adcon2 statement despite much searching and reading, including an ET topic last month - hope someone could help please.
I'm using the 18F2520/4520 chips with an internal osc at 4meg.
The Adc inputs are direct ntc and amplified signal inputs to ra0 and ra1.
For the ADCS Clock conversion bits 0-2, I can see that these should be set to Fosc/4 = 100
I can see that the ACQT Acquisition time bits need to be set to a specific value, but what ?
Should it be something like if Tad needs to be at least 2.4us, then the ACQT number of Tads is the number of tads times the ADCS frequency to give 2.4us ?
thanks
Richard