P-channel enhancement mode question

[rackley]

Hi all!

I think I know what's going on in my circuit but I'd like a second opinion (or third, or fourth.. ).

I'm using a p-channel enhancement mode mosfet, ST Micro STS3DPF60L, which is a dual mosfet in an SO-8 package. Datasheet is here, there is a quick schematic of it on the front page: **broken link removed**

Now, I placed this guy on the high side of a load (LED array) to switch the power to the LEDs on and off.

With +4.92v to the gate, I get 4.92v on the source, which is what I want.

However, when I apply 0v to the gate, I get 4.38 or so volts on the source, and the LEDs are still on, albeit a tiny bit dimmer.

This is about 0.54-0.55 volts loss, even though it's supposed to be closed off and 0v. So I look at the datasheet and the protection diode is pointing from drain to source. Since this voltage loss is very similar to what a diode would give, is this the protection diode that's screwing up my circuit and powering stuff even when the gate is off?

If so, can you even switch a load high-side with this kind of part, or no? I need something without a protection diode I'm assuming?

Thanks,
Ray

 

[dknguyen]

The so called "protection-diode" is parasitic. It was not purposely put there. A MOSFET cannot be made without one. Coincidentally though, a diode in this position can be used to protect MOSFETs in H-bridges from the inductive flyback of the motor- it's not the best solution since the recovery time of these diodes need to be very fast, and the parasitic diode is very slow relative to discrete diodes, but it works in a pinch. This diode also makes it so the MOSFET can only block current in one direction.

I think you are treating PMOS like NMOS. THey do not switch the same, and their terminals do not have the same polarities.

For PMOS:
Source voltage > Drain voltage
OFF is Vsg = 0
ON is Vsg > |Vt|

(ie. low voltage = ON, hi voltage = OFF)

It's the opposite NMOS, essentially- the polarity of drain/source, and the voltages that will switch it.

I think you may have the drain/source terminals reversed, and are applying the gate voltages improperly.

 

[rackley]

Yes you're right, I had the gates hooked up like an NMOS, reversed from what it should be for a PMOS. Thanks!

Let's find out how good my soldering skills are on cutting some traces and jumpering this SO-8

 

[dknguyen]

That sucks. Maybe using a tiny carrier board to reroute the traces and then sticking that onto the main PCB- but that's just me. I just don't like to cut traces.

 

[rackley]

Naah it's OK, I managed.. I rotated the part 180*, bent some leads into the air and had at it with the iron. All better! I'm just glad it's a prototype and I don't have to do it another 50x