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Opamp with variable input level and constant output level

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BkraM

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Hi all,

I'm building a sine generator with an arduino.
It uses an 8bit resistor network as a DAC, sample rate is up to 83 Khz.
Currently i have a RC high frequency filter to smoothen out the signal a bit (especially needed for the higher frequencies).
Due to this filter the output level (peak to peak voltage) of the system also becomes somewhat variable with frequency.

I want to use an opamp to amplify the (sine) signal to a set peak to peak voltage, regardless of the input level.
Not sure how to approach this, can someone assist?

Thanks,
 
Have a google for 'AGC opamp schematic'.
 
Why not use a filter with a steeper roll-off (multi-pole low-pass filter) , and then move the corner frequency closer to to 83kHz?

How much distortion (harmonics) of 83kHz are you willing to tolerate?

Another way of asking the same question: What is the maximum slew-rate of the signal you are trying to synthesize?
 
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I used a 10-steps very rough digital sinewave (CMOS Cookbook from Don Lancaster) from a CD4018 and four resistors then filtered it with two series 4th-order Butterworth switched-capacitor lowpass filter ICs. The clock for the CD4018 and for the filters is the same and has a variable frequency. The resulting pure sinewave has only 0.005% distortion and the output level is absolutely flat over a wide frequency range.

Most half-decent Wien Bridge sinewave generator circuits use a Jfet for AGC but some use clipping diodes (cough, choke).
 
The AGC, that's what i'm looking for.
Might also be a good idea to have a closer look into the filter, if i can get a higher slew rate, would also do the trick.

I'll have a look at both, thanks for the advice
 
For example, if you generate a 5V square wave by loading 0 and 255 into your port every 6us (83kHz square wave), and then run it through a low-pass filter, here is what you get:

lp.gif
 
I was not aware that these results could be obtained by filtering of the signal!
(have not gone beyond RC filtering)
 
Hi,

I take it you are using a binary resistor network of some kind to generate voltage steps. I also assume that you either output 8 bits to this network from the micro controller chip or you pulse a set of binary counters up and then down, then another bit for the sign, then repeat. You then run the signal to a filter of some kind. The filter has a varied response to different frequencies, so you see a different amplitude with each new frequency. Since it is lowpass, as the frequency increases the output amplitude decreases. This will be true no matter how you do it.

The key is to combine PWM with any other technique, or just use PWM if you can get away with it.
So right now for example you output a binary code that gives you 2.5v out of the binary resistor network, and you get 2v out at 10kHz, but at 20kHz you only get 1v out (for example). What you would do then is when you output 10kHz you output that same 2v, but only for 50 percent of the time you normally would output that value, and 0v for the remainder of the 'sample' period. That will cut the average down to 1v output. At 20kHz however, you do not do this, you output that value for the entire length of time necessary. What this gives you is 1v at that point for both frequencies.

To do this for any frequency, you start from the max frequency and work down. Calculate the filter response and use that result to determine what the duty cycle for your digital outputs should be.

Unfortunately that may get a little hairy because you may not have enough bandwidth from the uC chip to do is this way, in which case you cut back the entire pattern. Instead of outputting 2v for 50 percent of the time, just output 1v for the entire sample period time. This will have a side effect of decreased resolution in the analog signal, but if the range of frequencies isnt too wide it will work.

You can also use feedback to determine the correct setting and that way you wont have to calculate the filter response and hard code the required amplitudes. This is better too if you have a variable load.

Another idea is to use a voltage controlled tuned filter.

The cleaner you can get the output of the resistor network to be the shorter the time constant of the filter has to be. This means you can use a smaller cap which will only affect the very high frequencies and wont bother the low frequency amplitude too much, provided the range isnt too very wide.

You might also consider dividing up the full range into bands, switching different resistors in for different bands, as long as you only intend to have one frequency output at a time (no mixed signals).
 
I was not aware that these results could be obtained by filtering of the signal!
(have not gone beyond RC filtering)
Didn't you learn that a squarewave is the fundamental frequency plus many harmonics? Then if you filter out the harmonics a pure sinewave remains.
One RC filter produces a gradual reduction of harmonics and might reduce the fundamental frequency a little. A Chebychev or Butterworth 2nd-order Sallen-Key filter made with an opamp as shown reduces the harmonics much more and leaves the fundamental frequency at a constant level.
 
I was not aware that these results could be obtained by filtering of the signal!
(have not gone beyond RC filtering)
Those are only 2-pole filters. 4, 6, and 8 pole filters are straightforward. Go to Microchip's web site, and download the free FilterLab software which helps you create your own filters.
 
A switched-capacitor lowpass filter IC can have an 8th-order (8 poles) filter. Maxim probably still make some.
To make my low distortion generator I used two 4th-order switched-capacitor lowpass filter ICs in series to make an 8th-order filter.
 
You could possibly forgo your use of the DAC and feed two square waves you generate with the arduino into a low pass switch-capacitor filter. Switch-capacitor filters can have such sharp roll-off and stop band attenuation that you can generate a very nice sinusoid from a square wave, directly. The first square wave feeds the input of the filter and operates at the frequency of the sinusoid you wish to generate. The second square wave is fed to the clock input of the filter and operates at the required multiple of the first frequency such that the corner frequency of the filter is slightly above the first frequency. Perhaps something like the MAX297 filter IC. The output amplitude should remain constant because the amplitude of the input square wave should be constant over frequency, and the pass band of the filter is fairly flat. In the case of the MAX297, the clock frequency should be about 64 times the input frequency. The filter will have to be followed by an op-amp buffer for load less than 10Kohm.

In your present design, the smoothness and amplitude of the output has more to do with the 8-bit step size than the sample clock feeding through and an agc circuit will be more complex than a single IC filter.
 
Looks like the way foreward is filtering, the filterlab seems to be a promising tool for a newcomer.
Thanks for the help guys!
 
One caution, a 83Khz cut-off frequency imposes some slew rate requirements on the opamps. A 741 or LM358 or 324 will not cut it...
 
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