Hi again,
I am happy we finally at least got the theory right, or should i say "I" finally got the theory right as i was making a mistake about the initial cap voltage for C1 and i think that is what caused the main problem. Funny though that the previous simulation i did still came out pretty close, but not as close as this last one. That's probably because i tested it with only one set of values and the right thing to do is what you did and test it with lots of different values, within reason of course.
This last one is based on the cap charging and discharging between 1/3 of Vcc to 2/3 of Vcc as that is governed by the three equal resistors connected to the non inverting terminal. That also makes the frequency independent of the supply voltage, insofar as the capacitors are considered linear even with DC voltage. What i overlooked at first was that the initial capacitor voltage of C1 actually reverses during some part of the operation (when the output of the op amp goes low) because at that time there is still a fairly stiff positive voltage across C2 and C0.
Real world worries included the fact that the op amp impedance would affect the charging of C1 in that it would slow it down much more than under ideal conditions of zero output impedance. Luckily, if R is kept high enough (like maybe 1k or higher) the time constant of C1 and any output impedance should be much faster than the time constant of R and Cx, meaning it should not have significant impact. It will have an impact eventually no doubt, but at a frequency which is probably higher than you will even be able to use with a regular microcontroller.
The other worry was that the real world op amp output will not be truly rail to rail and all the calculations are based on a perfect rail to rail performance. If that is not the case we might have to modify the formula slightly although it may scale perfectly with this defect which would make it easy to fix (multiply Cx by some factor). Otherwise it will have to be worked into the formula.
This will be very interesting to see how it goes in the real world. If you can test with the actual op amp you did the simulations with that would be good too. I seriously doubt that the on board peripheral comparator to the PIC chip is going to be as good as that LT device, which could easily bring in other problems.
Maybe you can post some results when you get them.
Also, did you mention what range of C0 you want to try to measure?
For microcontroller use, here is one algorithmic procedure...
1. Calculate Cx from Cx=1/(2*ln(2)*f*R1)
2. Using that estimate, calculate S from:
S=((C1-2*Cx)*(1/f-2*ln(A)*(C1+Cx)*R1))/(2*(ln(A)*C1-3*C1-2*Cx*ln(A))*R1)
3. Add Cx+S, that becomes the new Cx.
4. Repeat steps 2 and 3 until Cx stabilizes (probably one or two passes).
I did this with C1=0.1uf and got something like 0.87uf for Cx, then after one pass got 0.997uf which is better than 1 percent accuracy with only that one pass (actual Cx was 1uf).
The method itself is known as "Newtons Method".
Note that in the equation for S there are a few things that are calculated more than once so they can be stored and used wherever they appear in the calculation.
Another method to calculate S (less accurate and probably less stable) is to use a numerical derivative to develop the step, as this technique uses an actual derivative. This would require calculating Cx twice anyway though in the formula given in the previous post.