I am not doing something fancy at all. Instead of using one 74hc595 for each 7 seg display (6 in total) , i multiplex them using 2 x 74ch595. On the pic side, i have 2 data lines. One for the segments (anodes) of all the displays and one for the cathodes. (note that Dig1 SegA, Dig2 SegA,... Dig6 SegA are joined together and so are all the segments of all the displays).
To make the long story short on the pic side... i have 2 data pins , 2 pins for the shift register clock pulse and 2 pins for the storage register clock pulse (6 pins in total). The problem is that when i try to share the clock pins to the two 74hc595, the circuit does not work properly but it should since these pins carry exactly the some pulses, only the data are different.
It has to be a noise problem...but how can i solve it?