Monostable and Astable multivibrator circuit using CMOS gates

[olgaPB]

PLEASE somebody help me!
I have to design a monostable and a astable multivibrator circuit using cmos gates and simultate it in pspice I have been trying everything but I can't get a signal the output for the monostable has to produce 10 micro second pulses and the astable with oscilation frequency of 1KHz.

Thanks

 

[audioguru]

There are lots of ways to make a monostable pulse.

Cmos oscillators are simple. Use gates intead of inverters if you want.

 

[mneary]

You need to review the textbook section that discusses multivibrators. Or you can Google to find alternate explanations. Maybe someone who attended the same lecture can supply some insight.

Wikipedia has a nice discussion; just use your cmos gates instead of transistors.

 

[deroshan]

Could you please tell me how to design a single stage amplifier using BJT for a given gain?

 

[audioguru]

Could you please tell me how to design a single stage amplifier using BJT for a given gain?

This thread talks about Cmos pulse generators and oscillators, not BJT transistors. You should have started your own thread.

The voltage gain of a common-emitter transistor that doesn't have feedback from its collector to its base is simply the collector resistor (and anything in parallel with it) divided by the unbypassed emitter resistance.
Of course the input of the transistor must have a properly calculated DC bias voltage.

So a transistor wirh a 12k collector resistor, a 62k load and a 1k emitter resistor has a voltage gain of 10.
If the emitter resistor is bypassed then the voltage gain is about 180 with high distortion at high levels.

 

[deroshan]

Thank you...

This thread talks about Cmos pulse generators and oscillators, not BJT transistors. You should have started your own thread.

The voltage gain of a common-emitter transistor that doesn't have feedback from its collector to its base is simply the collector resistor (and anything in parallel with it) divided by the unbypassed emitter resistance.
Of course the input of the transistor must have a properly calculated DC bias voltage.

So a transistor wirh a 12k collector resistor, a 62k load and a 1k emitter resistor has a voltage gain of 10.
If the emitter resistor is bypassed then the voltage gain is about 180 with high distortion at high levels.

Hi thank you