Miller plateau in Buck Converter Synchronous

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Occio

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Hi, I can't understand why in hard switching there is Miller plateau but no presence of it in soft switching. I don't know if I'm thinking well considering Miller plateau effect: when, for example in the high-side FET turn-on with high load, when ids = iL, vgs = Vth + iL/gm and so it remains constant during vds reaches zero. But why in soft switching it doesn't happen? I read that I have to consider the polarity of Cgd: in hard switching vgd goes from negative to positive values while in soft switching it remains always positive. How can I connect the two things?
Thanks!
 
because you have two capacitances at work, Cgd and Cgs.

from page 3
 
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