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Microcontroller pins are open drain?

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Which paragraph(s) give you that impression?
 
at the RHS of that table it talks of pullups, adjacent to the column speaking of PA0-PA31.

Also, in our product , this pin is not going high when it should , and we suspect either its an open drain pin pin, or the softy (who's now left) never programmed it to go high when it should).
 
It simply says that the pin reset state is the pins being configured as: PIO or system IO, with their internal pull-ups enabled and the schmitt trigger enabled. It says that is the case for all pins on porta, portb and portc. I did notice that each pin can be programmed to use "multidrive", which allows it to act as an open drain output.

Have a look at the code for initialising the code - check for multidrive settings. Failing that, check where the pin it set high (if it is done by modifying the pin to an input, then it has the same effect as being open-drain).
 
Thanks, the pins PA0-PA31 are described as "I/O", and surely that means that they can be driven high or low (i.e. push pull)?

The Atmel documentation is pretty poor...please see the following microchip datasheet for the PIC12F629....page 6 gives the pin description table, and you are left in no doubt whatsoever what each pin does...why can't Atmel do this, Atmel's docs have been poor for years....


PIC12F629
https://www.electro-tech-online.com/custompdfs/2013/05/41190c.pdf
 
Thanks, the pins PA0-PA31 are described as "I/O", and surely that means that they can be driven high or low (i.e. push pull)?
I/O means input/output - it can be either. It doesn't describe the input (e.g. TTL/CMOS-level or Schmitt-trigger, etc.) or output (totem-pole, open drain, pull-up/down, etc.) characteristics. If the datasheet doesn't state the PA20/21 are any different to the other pins, then I would think that they're no different to the other pins.
 
thanks, but the datasheet doesnt make it clear what the other pins do either.....are Atmel micro's what you use when you don't want anyone to reverse engineer your product?...because not even the datasheet tells you what these pins do.
I am certain this is the case...just contrast the microchip and atmel datasheets.
 
Read section 26.1/26.2; in fact, read all of section 26 and you should understand the function of the IO pins.

I don't agree that Microchip documentation is necessarily always better than ATMEL documentation. I have found ATMEL to be more clear when describing how certain modules operate (timers/ECCP esp.). I have seen good and bad in both.
 
I've read Sect 26, it talks generally , -what is needed is a pin table, like microchip do. Im not going on at yourself, its Atmel, all they have to do is call a spade a spade.

I beleive, from reading a lot of vague , general data in the atmel datasheet that PA20 and PA21 are push pull drive capable?

I have no idea why a consultant engineer is saying he thinks these pins are open drain. I can't see anywhere in the atmel datasheet where it says they are open drain only....it appears that all I/O pins can be configured open drain, but dont have to be that.
 
Never worked with SAM3N, but I did work with the old AT91SAM7 a few years ago. Comparing documentation for a 32bit multi package up to 100pin microcontroller with an 8pin one and wondering why it's not as simple is a little silly.

The SAM3N comes in multiple packages with different pin/peripheral assignments. If they wanted to do the table you described they would need 4 giant tables. Instead they have a peripheral assignment table for each package and then a peripheral description summary table for the signal types. Table 3.1 gives descriptions of each of the signal types just as clearly as the PIC documentation. Tables 4.1, 4.2, 4.3, and 4.4 give peripheral assignments per pin. PA20 and PA21 are standard GPIO pins, they work as described in section 6.1. There's no ambiguity here. It's more complicated so the documentation is going to be more complicated.
 
does a "standard GPIO pin" have the capability to be driven "push-pull" style?

I dont see the words "push-pull" or "totem-pole" in the datasheet, and these are the only terms that accurately describe this feature of a pin being able to actively drive high.
 
does a "standard GPIO pin" have the capability to be driven "push-pull" style?

I dont see the words "push-pull" or "totem-pole" in the datasheet, and these are the only terms that accurately describe this feature of a pin being able to actively drive high.

Those terms are not on the PIC documentation either.
 
Those terms are not on the PIC documentation either.

very true, up till now , i have always unthinkingly presumed "general purpose I/0" meant "push-pull capable output pin"

Am i right?
 
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