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Looking for help, can't understand weird effect in traisient analysis.

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ngerg

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I see some weird result that disturbs my curiosity.

I done this simulation using MicroCap9. But I guess this is not special to microcap,

I build this simple circuit (attached).
When I do transient analysis simulation, what I see appears as if the capacitor C3 is initially is charged (there is small voltage of some 180m Volt over capacitor that slowly discharges - see the attached graphs).

Do anyone encountered something like that?
What I miss here?

The circuit:

**broken link removed**


Capacitor C3 discharge:
**broken link removed**

Thank you. Greg
 
The combination C3 and R4 appear shorted the line between them, so C3 didn't charge much and as the graphs show, it only charged to a maximum of about 240mV which is about the same value it started discharging.
 
Last edited:
Thanks for the answer,
But could you please elaborate, I don't understand why C3 should be charged at all, Why it started with voltage over it?

Thank you.
 
I see some weird result that disturbs my curiosity.

I done this simulation using MicroCap9. But I guess this is not special to microcap,

I build this simple circuit (attached).
When I do transient analysis simulation, what I see appears as if the capacitor C3 is initially is charged (there is small voltage of some 180m Volt over capacitor that slowly discharges - see the attached graphs).

Do anyone encountered something like that?
What I miss here?

The circuit:

**broken link removed**


Capacitor C3 discharge:
**broken link removed**

Thank you. Greg


Hi,

There shouldnt be any voltage across C3. It should be zero volts for all time. There's something wrong somewhere in the software, however it probably wasnt made for doing that anyway and there isnt any reason to do that.

What does vg1 go to, anything else? Remove that and see if it helps.
Also, try setting that cap to 100n ic=0v and see if that helps.

Mine (v7) doesnt do that, but i do get a small voltage of 10pv or 20fv depending on the size of the resistor in series with it. if i make it 2k or 200k i get exactly 0v across it at all times, but 20k causes a very small voltage to appear across the cap.

Why would you want to connect it like that anyway though?
 
Last edited:
Thanks, I actually arrived at this circuit form different one:

the R2 should be connected to opto that switches the FET on \off -

**broken link removed**


I slowly evolve to believe this just bug in the program.
 
I have not used MicroCaps for years. I remember a "time slice" setting. Maybe I have the word wrong...but a way to make the computer work harder to do the sim. The computer makes a loop around the circuit every (1uS) or so and analogizes everything. It that 1uS was 0.1uS or 0.01uS it will take longer to sim but this error you see will get smaller by 10 or 100:1.

Some programs have a setting as to how many times the computer loops around the circuit. If 1000 is changed to 10,000 then this error is reduced. Some programs have a setting to only look at nodes that change by 0.1% (some number) and if that was set to 0.01% these errors go down.
 
I just looked in MicroCap8 and I think you should play with "Maximum Time Step" (make smaller) and "Number of Points" (make bigger).
 
Thank you all, Hopefully I'll try it tomorrow, or the day after tomorrow and see what happens...
 
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