"Latching" analogue voltage

[bh00]

Hi,

Is there a chip or device that would 'latch' an analogue signal between 0-5v in a similar way a digital latch or D-type would work?

Basically I have only one pin of a microcontrollre that can generate pwm, and this way I can use it to control and hold many circuits at different levels by clocking the different 'analogue latches' to update them.

Thanks

 

[Papabravo]

Yes it is called a sample and hold. It is a switch which provides a low impeadance path to a capacitor. When the switch is opened the impedance to ground which would discharge the capacitor is very large. As a result the capacitor "holds' the voltage.

Hope this helps

 

[bh00]

Thanks, so we're looking at sometihng like this then? What kind of values of a capacitor would be good?

Whats the most efficient way of generating the analogue voltage from the pwm pin anyway - I think I need a capacitor charging through a resistor from the pin right - again, what kind of values are suitable?

How easy is it to get that opamp to have a gain of 2, so the actual output varies from 0v to 10v?

 

[Styx]

Thanks, so we're looking at sometihng like this then? What kind of values of a capacitor would be good?

Whats the most efficient way of generating the analogue voltage from the pwm pin anyway - I think I need a capacitor charging through a resistor from the pin right - again, what kind of values are suitable?

How easy is it to get that opamp to have a gain of 2, so the actual output varies from 0v to 10v?

not sure abt the 1st bit,
but for the gain of two use a non-inverting OPAMP arrangement,
This way you will get

1) non-inverted gain
2) a gain of two
3) a high-input impedance

 

[Papabravo]

Superficially yes. The choice of values depends on the frequency components you expect on the input signal. It would also be common to put a resistor between the switch and the capacitor so that closing the switch would not subject the input signal to the voltage on the capacitor.

You may recognize the combination of the R and C as a single pole low pass filter. If I was you I would put the 3dB point at 2 or 3 times the highest frequency you expect on the analog input. Ten times the highest frequency component would be better; that way you can adjust your sampling window and be assured that the input will charge the capacitor up or down to the desired value.

In picking components I generally pick a power of ten for the capacitor eg. .01 uF, .1 uF, or 1 uF, and then I pick the resistor because there is a much wider selection of resistor values than there is capacitor values.

To get a gain of 2 connect the minus input to the middle of a voltage divider from the output to ground with equal value resistors. Remember to have a supply voltage greater than the output range so you don't run into common mode problems.

 

[Roff]

Keep in mind that PWM is a digital signal. The only thing analog about it is the duty cycle. You can't use a sample and hold to "latch" a PWM signal. You can average the PWM signal with a lowpass filter, but you now have a DC voltage. This does not have some of the advantages of PWM.
Also, a sample & hold will droop. It will not hold indefinitely like a latch will. You will have to refresh it fairly frequently.

 

[Dr.EM]

A sample and hold system is detailed in this datasheet:

https://www.electro-tech-online.com/custompdfs/2006/05/LM13700.pdf

I have not tried it yet, but presumably it works.

 

[Roff]

A sample and hold system is detailed in this datasheet:

https://www.electro-tech-online.com/custompdfs/2006/05/LM13700-1.pdf

I have not tried it yet, but presumably it works.

Due to the fact that the Darlington emitter follower (which has bias current) in the LM13700 is used as the buffer for the hold cap, this is not the ideal part for a long-term S&H. A CMOS op amp is probably the best choice for a buffer.

 

[Dr.EM]

Very well, I shan't bother trying it then

I have tried this design with absolutely no success:

**broken link removed**

But just noticed these too:

**broken link removed**

**broken link removed**

May try one out, but probably not so let me know if either work if you try them.

 

[Russlk]

The really simple way is to filter the PWM to DC as Ron suggested, feed it to an ADC and latch. Use an R-2R ladder for the DC output.

 

[dknguyen]

S&h

I found this S&H circuit: Seems pretty simple. its a capacitor, op amp and transistor. There is also a more complicated one I dont quite understand.

its on page 13 of the document:
https://www.electro-tech-online.com/custompdfs/2006/05/AN-31.pdf

 

[Russlk]

The S&H with two transistors has feedback to Q2, holding it at the capacitor voltage so its leakage does not contribute to discharge. Q1 provides isolation between the source and the S&H circuit.

 

[bh00]

Thanks for the replies, there are some good looking solutions here, hopefully I'll get time to give them a go soon!