Kvl equation

[Heidi]

Dear friends,

In the circuit, fig1, attatched below, I want to apply KVL around the loop containing the voltage source, R1, C1, and switch after the switch is open. Should I include the voltage across the capacitor? The voltage across and current through the capacitor would 'swing' even after the witch is open.

Thank you!

 

[MikeMl]

There might be voltage left on the capacitor the instant after the switch opens.
The current through the branch containing the switch might be finite before the switch opens; but goes to zero the instant the switch opens.

 

[Heidi]

It shows in PSpicce that the current through the capacitor will jump up and down approximately between 4nA and -4nA, 19 seconds later when the switch is open. Does this happen in practice even the current is very small?

 

[MikeMl]

It shows in PSpicce that the current through the capacitor will jump up and down approximately between 4nA and -4nA, 19 seconds later when the switch is open. Does this happen in practice even the current is very small?

No. That is some artifact of the simulator.

 

[Ratchit]

Dear friends,

In the circuit, fig1, attatched below, I want to apply KVL around the loop containing the voltage source, R1, C1, and switch after the switch is open. Should I include the voltage across the capacitor? The voltage across and current through the capacitor would 'swing' even after the witch is open.

Thank you!

Are you trying to do a transient analysis or an AC analysis? Is the switch initially open or closed? What does tOpen=0 mean; zero time or voltage? Same with IC=0. V1 is 90° phase with reference to what? Current does not exist through a capacitor.

Ratch

 

[Heidi]

Are you trying to do a transient analysis or an AC analysis? Is the switch initially open or closed? What does tOpen=0 mean; zero time or voltage? Same with IC=0. V1 is 90° phase with reference to what? Current does not exist through a capacitor.

Sorry.

I was doing a transient analysis.
tOpen=0 means the switch is open at time t=0. For t<0, the switch is closed.
IC=0 refers to the initial condition, the initial voltage of the capacitor is zero.
Voltage source V1=sin(wt + 90 degrees)

 

[MikeMl]

The capacitive reactance of 1nF at 50Hz is so high (>3MegOhms) that not much happens before or after the switch is open...

 

[Ratchit]

Sorry.

I was doing a transient analysis.
tOpen=0 means the switch is open at time t=0. For t<0, the switch is closed.
IC=0 refers to the initial condition, the initial voltage of the capacitor is zero.
Voltage source V1=sin(wt + 90 degrees)

Heidi,
So at t=0, V1 is at its highest positive value. How can you specify IC=0 when its value at t=0 will be determined by the voltage and phase of V1, which has been running for an undetermined amount of time before t=0? You cannot do a KVL at t=0 because the current in the loop will be zero when the switch is opened. The voltage, and thereby the energy of the capacitor, will remain steady at what it was when the switch was opened.

Ratch

 

[MrAl]

Hi,

Switches in circuits pose interesting problems. Most of the time in analog circuits the effect of the switch is not completely dependent on the switch itself but on the circuit connected to it. The switch state is considered as causing a change in topology, where we use the final conditions from the previous topology as the initial conditions for the following topology. So the switch merely takes us from one topology to the next.

For example, to sum the voltages around the left hand side loop you have to know the voltage across the switch, and to get the voltage across the switch when the switch opens you have to consider R3 as well. R2 and R3 form a voltage divider, so the voltage across the switch at time t0 is equal to the voltage at the junction of R2 and R3 at time t0+ minus the capacitor voltage at time t0-. t0+ is an infinitesimally short time after the switch is opened, and t0- is an infinitesimally short time just before the switch is opened. So you need vDivider(t0-) and vDivider(t0+) and the voltage across the switch is then equal to vDivider(t0+)-vDivider(t0-). vDivider(t0-) will be a constant, and vDivider(t0+) will vary with the input sine. To obtain vDivider(t0-) you have to compute the voltage due to the sinusoidal excitation on the two resistor and capacitor circuit at the point t0 in time, i assume you already know how to do.

KVL would then be the sum of the voltage source, voltage across R1, voltage across the capacitor, and the voltage across the switch as found from above:
Vs+vR1+vC+vSw=0

 

[Heidi]

Dear friends,

It seems that I have made things complicated.

At first, I was trying to solve a problem, meanwhile, in order to confirm some of my thoughts, or to figure out the reasons for some procedures, I "imagined" a situation and tried to solve it. I failed, so I asked that question which wasn't really on my textbooks.

As nice as you are, spending time explanning things for me, but understanding some of your explanations requires knowledge that I don't have right now. For example, I didn't know there will be a voltage across a switch, and I didn't set my circuit conditions reasonably.

So I have probably had your time wasted, I'm sorry, and I'm thankful for all your help, it makes difference, I think differently!

 

[MrAl]

Dear friends,

It seems that I have made things complicated.

At first, I was trying to solve a problem, meanwhile, in order to confirm some of my thoughts, or to figure out the reasons for some procedures, I "imagined" a situation and tried to solve it. I failed, so I asked that question which wasn't really on my textbooks.

As nice as you are, spending time explanning things for me, but understanding some of your explanations requires knowledge that I don't have right now. For example, I didn't know there will be a voltage across a switch, and I didn't set my circuit conditions reasonably.

So I have probably had your time wasted, I'm sorry, and I'm thankful for all your help, it makes difference, I think differently!

Hi,

First off, i never waste my time therefore you could never waste it for me
Whatever i do helps me too to remember certain things about circuits, and i usually enjoy doing them anyway unless i have something more pressing at home. So if i bother to take the time to do something at all then to me i have not wasted it.

I did find this problem a little interesting too and the solution isnt too difficult, although i did wonder why you would want to sum the voltages around that loop.

 

[Heidi]

I did find this problem a little interesting too and the solution isnt too difficult, although i did wonder why you would want to sum the voltages around that loop.
One test is worth a thousand expert opinions, but one expert

Originally I was asked to determine the Thevenin equivalent of the circuit shown in 1.pdf below.

Then I have my own question: is there really no "current" flowing through C1 when terminals A, B is short-circuited? I doubt it.

This is how I think: referring to fig.1 in 1.pdf, there is an alternating voltage at node N1, electrons in wires S1 and S2 must be forced to move back and forth between the upper plate of C1 and S1, and between the lower plate and S2, hence the charge on the plates is also changing, resulting in voltage across C1. It might be difficult to measure, small enough to be neglected, but it exists I believe.

So I put it into simulation as shown in fig2.

V1= sin(2*pi*f*t +90 degrees)
f=50Hz
R1=200 ohms
R2=100 ohms
C1=1mF, assume initially uncharged
switch U3 is closed at t=0
switch U1 is open at arbitrarily t=20ms
do a transient analysis

If we focus on the current through C1 AFTER switch U1 is open, we see "current" flowing back and forth even it is extremely small, as shown fig3.

Maybe I should have asked my question like this: if I apply KVL around the left loop of the citcuit shown in fig1 in 1.pdf, the voltage across C1 can be neglected, but really there is an extremely small alternating voltage across that capacitor C1, do you agree?

 

[MrAl]

Hi,

In that circuit you have two AC voltage sources. This means that the current through C1 depends on both sources. In general there will be current flow, but if the sources are set right you can make it go to zero. So it depends on a very specific set of rules for setting the two voltage sources. You could solve for the second source that causes zero current knowing the first source and the component values. This is with A and B shorted as you mentioned of course. Of course the frequency of the sources is going to matter also. If one frequency is twice that of the other there's no phase shift that can cause zero AC current.

 

[Heidi]

Then I have my own question: is there really no "current" flowing through C1 when terminals A, B is short-circuited? I doubt it.

I'm terribly sorry. I had a typo.
My question should have been 'is there really no "current" flowing through C1 when terminals A, B is OPEN-circuited?'
As shown below, I have removed the AC voltage source between C1 and terminal A from the original circuit.

The schematic and the "current" through C1 after the switch U1 has been opened are shown below, the current curve is between 21ms and 90ms.
That is why I said there's actually a AC voltage across C1 when applying KVL around the left-hand loop while A, B is open-circuited, and I would like to have your comment.

 

[MrAl]

Hi,

There is current through the cap while A and B are connected, and with an AC source you would see an AC current and an AC voltage. But as soon as A and B is opened, the current stops and the CHANGE in voltage also stops except for the minor leakage current that causes the voltage to decrease with an imperfect capacitor. So the voltage across the cap will be a DC voltage, unless you happened to have opened the A,B at the very instant when the AC voltage across the cap was going through zero and then it would be zero volts DC.

The only way to get a cap to change it's voltage is with a current through it. An open circuited cap has no current flow through it so there is no change in voltage across the cap.