Hello everyone, I'm having some difficulties understanding the following, I hope you can help me figure it out.
I have the basic understanding of the JFET, with it's pinchoff voltage, IDSS and all that. So after that, I tried to think of what would happen with temperature variations.
Lets say it's a n-channel JFET and you raise the temperature, I can see the IDSS would get smaller because of the reduced mobility of carriers in the channel. But I can't seem to figure out what would happen to the pinchoff voltage...
I know it's supposed to decrease (increase in absolute value). The only way I could try to explain this would be with a reduction of the depletion region's width in the PN junction because of the raise of temperature.
If that's the case, why does it happen? If I had to, I'd say it's because of thermal generation of carriers, but I'm not sure how that works anyway.
If it's not the case, then I have no idea...
Thanks for your help guys, I've been thinking a lot about it this last couple of days and couldn't reach anything.
I have the basic understanding of the JFET, with it's pinchoff voltage, IDSS and all that. So after that, I tried to think of what would happen with temperature variations.
Lets say it's a n-channel JFET and you raise the temperature, I can see the IDSS would get smaller because of the reduced mobility of carriers in the channel. But I can't seem to figure out what would happen to the pinchoff voltage...
I know it's supposed to decrease (increase in absolute value). The only way I could try to explain this would be with a reduction of the depletion region's width in the PN junction because of the raise of temperature.
If that's the case, why does it happen? If I had to, I'd say it's because of thermal generation of carriers, but I'm not sure how that works anyway.
If it's not the case, then I have no idea...
Thanks for your help guys, I've been thinking a lot about it this last couple of days and couldn't reach anything.
