The following is a flyback with vin = 250V, VOUT = 30V, pout=22.5w, fsw=97khz, CCM, current mode.
The only way to measure an effective feedback loop gain/phase plot is to put the two opamp buffers (U3 and U2) either side of the feedback loop injection resistor, R7.
Do you agree? (schematic attached)
The “standard” position for the loop injection resistor is sometimes seen in series with the upper divider resistor, R12, however, if the Opamps were not added, R12 would need an RC circuit across it to reduce vout overshoot at start-up, and the capacitance of the “C” of this “RC” circuit means that the upper feedback divider impedance is too low to allow series insertion of the loop injection resistor there.
(The loop injection resistor must “see” low impedance “looking out” from one of its terminals, and high impedance “looking out” from its other terminal…..thus the two opamps)
When the opamps are used, the RC circuit of R3 and C2 prevent overshoot at start-up.
Do you agree that this method is the best way to get a bona fide gain/phase plot of the SMPS?……when the measurement has been taken during testing, the two opamps and loop injection resistor will simply remain fitted when shipped to customer, as they do no harm.
Here is the schematic and LT spice simulation with loop injection going on.
The feedback loop signals (‘loop_in’ & ‘loop_out’) appear to show a phase margin of 45 degrees at the crossover frequency.
(bode plots measured eg with AP300 frequency analyser)
The only way to measure an effective feedback loop gain/phase plot is to put the two opamp buffers (U3 and U2) either side of the feedback loop injection resistor, R7.
Do you agree? (schematic attached)
The “standard” position for the loop injection resistor is sometimes seen in series with the upper divider resistor, R12, however, if the Opamps were not added, R12 would need an RC circuit across it to reduce vout overshoot at start-up, and the capacitance of the “C” of this “RC” circuit means that the upper feedback divider impedance is too low to allow series insertion of the loop injection resistor there.
(The loop injection resistor must “see” low impedance “looking out” from one of its terminals, and high impedance “looking out” from its other terminal…..thus the two opamps)
When the opamps are used, the RC circuit of R3 and C2 prevent overshoot at start-up.
Do you agree that this method is the best way to get a bona fide gain/phase plot of the SMPS?……when the measurement has been taken during testing, the two opamps and loop injection resistor will simply remain fitted when shipped to customer, as they do no harm.
Here is the schematic and LT spice simulation with loop injection going on.
The feedback loop signals (‘loop_in’ & ‘loop_out’) appear to show a phase margin of 45 degrees at the crossover frequency.
(bode plots measured eg with AP300 frequency analyser)
