interrupts

[jagjoes]

I am a beginner in microcontrollers and need some help iwant to know that how can i take 15 external interrupts in 89c51 as i only have 2 interrupt pins please give me circuit diagram to explain.......

 

[Papabravo]

The circuit is called a priority encoder. I believe the part number is 74148. I dont know if it has been realized in a more modern technology than TTL.

 

[mcs51mc]

Interrupts or Inputs ?

74148 is 8 lines to 3, the guy need something like 16 to 4 but nevertheless that will not react like one expect from interrupts, you know:
1) halt normal program
2) jump to Interrupt Service Routine
3) with a RETI resume normal program

So jagjoes if you really need 15 interrupts, and I mean interrupts, 89C51 is not that part you need.
If you need 15 inputs to a µC then consider memory mapped I/O, using I²C I/O chips, part with more I/O...

 

[hjames]

The 74148 chip is used in this case. The "GS" output of the chips is tied to the 89C51's interrupt input so that the CPU can check the 74148 chips to see which of the 15 ISR's it should then branch off to. The 74148's can be cascaded, so that'll handle 16 inputs.

The thing is that there are bound to be lost interrupts with that many sources, and since there isn't any state... I think the standard thing is to use a PAL/GAL/CPLD for this sort of stuff. And if you don't want to lose any interrupts, have a bunch of flags, and an ack line coming back from the CPU.

The best solution is to redesign the thing so that it doesn't need that many interrupts in the first place. Polling is easy and robust as long as you can tolerate the jitter.

 

[Papabravo]

As long as the interrupt signals maintain their state until serviced and released by the processor, no interrupts will be lost. These chips were used often and to great effect in designs that predated the microprocessor. I do occasionally know what I am talking about.

 

[jagjoes]

thanks everyone for their help and replies>>>

 

[hjames]

As long as the interrupt signals maintain their state until serviced and released by the processor, no interrupts will be lost. These chips were used often and to great effect in designs that predated the microprocessor. I do occasionally know what I am talking about.

I stand corrected - I've never specifically had to expand a processor's interrupt mechanism so I didn't immediately see it in that way.

 

[Nigel Goodwin]

My immediate thought is 'WHY?' - it strikes me as the entire premise of the project is wrong if it appears to need 15 external interrupts?. But as the project itself has never been mentioned, we've no idea what it's supposed to do?.

 

[philba]

As long as the interrupt signals maintain their state until serviced and released by the processor, no interrupts will be lost. These chips were used often and to great effect in designs that predated the microprocessor. I do occasionally know what I am talking about.

using a priority encoder is a bit tricky, though. On the 74xx148, the E0 line is the interrupt pin. The ISR needs to loop handing each '148 input source in turn until the E0 line goes low. If the '148s input levels can go away, the ISR needs to be aware of this.

I agree with nigel, this sounds like it needs to be rethought. without knowing the actual application, I'd be inclined to look at an I/O expander like the MCP23016.