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I2C Testing for Bus Collisons

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jpanhalt

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I have been sorting through Microchip's various application notes, forum threads, and PowerPoint presentations on implementing an I2C bus. They date back to last century. One of the most recent ap notes is from 2013 by Chris Best. There have been a few version of that note. The version I found most interesting is AN734C ( https://ww1.microchip.com/downloads/en/AppNotes/00000734C.pdf ). Alternatively, code by Chris Parris in AN989 doesn't use an interrupt and doesn't test for bus collisions (https://ww1.microchip.com/downloads/en/AppNotes/00989A.pdf ). I will be using an MSSP module.

Does testing for write collision and bus collision only apply to instances with more than one master and/or one slave?

Regards, John
 
I can say that the start bit is used to avoid that with multiple slaves, when a start is triggered the slave listens for its address , if address is wrong slave will stop listening till next start command.
regardless of interrupt.

I dont think you need to worry about it if there is only one of each.

not sure though how masters listen for an open line and avoids collision with other masters.
 
That makes sense and is what I assumed. The Chris Best code is written for a single master and slave, but I suspected the write collision and bus collision flags were tested just for completeness, as the examples in earlier versions AN734 did not include those checks.

Thank you both.

John
 
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