I2C Load Capacitance ISSUE-Urgent

Hi,
I am interfacing my FPGA with DS2782 ("Stand-Alone Fuel Gauge IC") for I2C communication. And i have the doubt of AC Loading .
For FPGA, the output load capacitance of each pin is given as 10pF and for DS2782, the input capacitance is given as 60 pF. It seems to be Loading problem.
Will my I2C communication be proper? or Should i have to use any Fan Out buffers?

Thanks in advance.
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What is the pull up resistor?
You might need to run slower.

My pull up resistor will be 10 K for both SCL and SDL.
Could you please explain me how the AC Loading analysis is dependent of resistor values?

Imagine there was a capacitor from the line to ground. When the line is released, this capacitor would have to be charged trough pull-up resitstor. The bigger the capacitor the longer it would take. Also, the bigger the resistor the longer it takes. That is why your speed is limited by big parasitic capacitance and big pull-up resistor. You can either:

- lower the speed
- use better connection with less capacitance
- decrease pull-up to 2.2k or so. If the distance is long, it's good to use pull-ups on both sides.

Do you mean there exists internal capacitors in both the devices? I heard that its Load capacitor.
Let me know about AC Loading procedure for 2 I2C devices
Let Device 1(D1) be Master and Device 2 (D2),Device 3(D3),Device 4(D4) be the slave.
Then the output capacitance of D1 id 10 pF and Input capacitance of D2, D3, D4 are 60 pF each.
Does the master has the capability to source for all the three slaves?

Thanks

The ICs can drive large capacitors....but slow..
You do add up all the caps yo find the total.

ssundar.shan said:

Do you mean there exists internal capacitors in both the devices? I heard that its Load capacitor.
Let me know about AC Loading procedure for 2 I2C devices
Let Device 1(D1) be Master and Device 2 (D2),Device 3(D3),Device 4(D4) be the slave.
Then the output capacitance of D1 id 10 pF and Input capacitance of D2, D3, D4 are 60 pF each.
Does the master has the capability to source for all the three slaves?

Click to expand...

These are not capacitors put there on purpose. Parasitic capacitance. In wires, traces too. The bigger your network, the more capacitance. You can calculate rise times knowing the capacitance and the values of your pullup resistors. Multiply it by 6 or so. This will give you an idea of maximum possible speed.

The IC2 controller (master or slave regardless) should be able to pull down the line quicker, because the capacitance gets discharged through much lower resistance then your pullup resistor.