I/O mapped I/O question

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On a 8051 RAM and ROM can be external and internal... So yes!
 
if one has both option(memory mapped I/O and I/O mapped I/O) to access RAM/ROM why memory mapped I/O? why not I/O mapped I/O?
 
can RAM or ROM memory be addressed using I/O mapped I/O?
I don't really understand "I/O mapped memory"
1) There is internal memory and external memory. Simply memory can be inside the IC or in another external IC.
2)There is CODE memory which can be read but not written and normally contains instructions. AND Data memory (RAM memory) that normally holds data.
That describes 4 types of memory.
 
hi RON, that really doesn't answer my second question,

"if one has both option(memory mapped I/O and I/O mapped I/O) to access RAM/ROM why memory mapped I/O? why not I/O mapped I/O? "

what do you mean by I/O mapped memory? do you mean memory mapped I/O?
 
I think I/O is done through special function registers. There is only a small numbers of those available.
There are 64k of memory locations.
 
If we are talking about the intel..... Then mapped I/O refers to address space..... I'll explain...

On most micro controllers ports, modules and peripherals are set in stone... Each has several address in memory SFR's ( RAM) that controls their actions.. The Intel micro also has SFR's for the basic stuff.. BUT! can also have mapped I/O... If you place an LCD at some arbitrary address.. ie.. 0xA000... You can read and write to that address, the same as you would if it were an SFR...
 
hi Ian,

thanks for your reply

but the question why I/O mapped I/O not used for RAM? for example in case of 8085
 
The old 6502 and the old ZX80 used to have 255 memory mapped I/O addresses.... Just the way it was designed..

I suppose at the time of design the designers didn't expect to connect so many devices to the processor...
 
I think on the 8051 a 8 bit address is faster than a 16 bit address. When I look at the number of clocks it takes to address something.
 
By memory mapped I/O, are we referring to the ability to use hardware buffers and gates to hard lock a piece of hardware interfaced to the 8051's FSB to a RAM memory address or address block, then read/write on that piece of hardware via use of the movx instruction?
 
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