I have problem with simulating CST drawing.

[Spd]

Hello everybody.

I am totally new in microwave studio. I can't get my drawing result stimulated same as a published article result. During the stimulation, i received warning showed "some of the PEC material is touching the boundary". I guess i am not so sure about the boundary condition which to set. i have attached my drawing and the published article.

Anyone that is able to help me in this?

thanks

 

[JimB]

Looks like deja vu to me!

https://www.electro-tech-online.com/threads/cst-mws-boundary-conditions-problem.94199/

is whole class going to be asking how to use this thing?

JimB

 

[Papabravo]

The following article from /. kinda got to me this morning and then I read this post. Maybe I need to climb down off my high horse.

Slashdot | Indian CEO Says Most US Tech Grads "Unemployable"

 

[Spd]

if the ground panel have the same width with the substance but its length is 3 times shorter than the substance. For the boundary condition zmin, i should define as electric, magnetic or open (space)?

 

[RadioRon]

You should define all boundaries as Open (add space) or the equivalent.

 

[Spd]

Thanks for replying.

In my drawing, i assign my port 1 showed in the picture below:

**broken link removed**

So i should set it to open or open(add space) in the Ymin? Because if i set it as open (add space) it seem like the port is not attach to the feeding point.

Can't i just set the ymin to open and the rest to open(add space)?

 

[RadioRon]

So i should set it to open or open(add space) in the Ymin? Because if i set it as open (add space) it seem like the port is not attach to the feeding point.

Can't i just set the ymin to open and the rest to open(add space)?

Yes, you are right, you can and should just set ymin to open. The port must be touching the feedpoint.

You have the option of floating the port location away from the boundary and fixing the port location at the edge of the pcb and adjusting its size too, despite the location of the boundary, but your approach in this case is simpler.

 

[Spd]

Thanks RadioRon for helping up.

I have set my boundary condition for Ymin to open which mean my drawing will appear like the pictures showed below.

The pic consists of my front and backview of my drawing:

Front view: **broken link removed**

Back View: **broken link removed**

My concern is that am i right that my port 1 is touching the substance, Pec ground and the PEC patch? I have tried stimulated my drawing but it showed one warning which stated "Some higher propagating modes at port 1 are not considered in time domain calculation. This possibly leads to an inaccurate energy balance. Consider to reduce the port size or decrease the upper frequency limit." How do i get rid of this warning?

As what you have mentioned earlier "You have the option of floating the port location away from the boundary and fixing the port location at the edge of the pcb and adjusting its size too."? I have tried by picking the first point at the edge of grd pannel and the second point is at the top edge of the substance. Afterwards i select the discrete port and assign the port 1 as showed in the picture below:

**broken link removed**

Is this correct or you got any suggestion to improve it or recorrecting me?

 

[RadioRon]

My concern is that am i right that my port 1 is touching the substance, Pec ground and the PEC patch? I have tried stimulated my drawing but it showed one warning which stated "Some higher propagating modes at port 1 are not considered in time domain calculation. This possibly leads to an inaccurate energy balance. Consider to reduce the port size or decrease the upper frequency limit." How do i get rid of this warning?

As what you have mentioned earlier "You have the option of floating the port location away from the boundary and fixing the port location at the edge of the pcb and adjusting its size too."? I have tried by picking the first point at the edge of grd pannel and the second point is at the top edge of the substance. Afterwards i select the discrete port and assign the port 1 as showed in the picture below:



Is this correct or you got any suggestion to improve it or recorrecting me?

In your first question, the obvious way to get rid of the warning is to reduce the port size or decrease the upper frequency limit, as the simulator suggested. One way to do this is to decrease the size of your waveguide port so that it is bounded by the ground plane at the bottom, a line about 3 times the depth of the pcb substrate above the top conductor at the top, and a width of about 8 times the width of the microstrip line. This is large enough to cover the majority of energy, while small enough to discourage higher order modes.

You then changed the model to include a discrete port instead of waveguide port. To use the discrete port, it must be positioned as if it was a signal generator feeding the antenna, so it must span the gap between ground plane and microstrip feedpoint and touch both of them at its ends.

 

[Spd]

ok noted. thanks anyway.

I would like to find out that where can i find the topic in the cst help content for making my structure into global.. It is used to convert the structure for fabrication.

 

[theepaK]

i tried keeping width as 8 times or 6 times but my line impedance is around 51...
if i increase the width from 6 to 10,my VSWR is getting poorer...
if i keep around 4 times my VSWR is good..but line impedance is increase to 52...
pls suggest me a way out sir..

Thanks