D = Data, Clk = Clock
Set and Reset are active high, which means a high on one of these pins will set or reset the FF.
Is S and R are both held low, the state of D (ie. whether it is high or low) is transferred to Q when the voltage on the Clk input undergoes a positive transition, ie. goes from low to high. Q' (ie. Q bar) is complementary to Q, ie. when Q is high, Q' is low and vice versa.
There is no change to Q and Q' when the Clk input goes from high to low.
Now, if a high is applied to the Set (with R = low), the Q output is set high and Q' low.
Or if a high is appled to the Reset (with S = low), the Q output is set low and Q' high.
Set and Reset overide the clock input so it does not matter if the Clk input goes high while S or R = high.
If S & R are both high, both Q & Q' go high, but this is not normally done since there is no point in doing it.
What I have just explained is what the truth table in the data sheet specifies.
So I suggest you look at the truth table while reading my explaination and see if you can reconcile them. If not, feel free to ask more questions.
Have you done a search in this forum for "flip flop"? There have been other threads on the subject in the past.