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How to design simple circuit for measuring nanosecond?

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wjhwong

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Hi!

I am doing a project to measure the delay time respond for the 74 series chip in nanosecond. May I know how to start? which PIC or chip should I use? 555 timer can be used in my design project? Thanks!
 
Generally a high speed oscilloscope is used for that measurement. You could also use a high speed counter, but for ns resolution, the counter would have to have a clock rate of at least 1GHz. A 555 could perhaps be used for ms measurements not ns.
 
The only way I know how to measure ns resolution is to start with a GHz clock and then use the signal whose duration is being measured to gate the GHz clock into a counter. This is much beyond the capabilities of a PIC, which can count at most 50Mhz. This requires very-high-speed logic.
 
Spectrum analyzers are used to measure signals in the frequency domain not time. As Mike said in order to measure time periods of a nano second you need a minimum clock frequency of 1 gigahertz, it would not be easy to do what you're asking. What is your project that you need to measure periods so small?
 
Hi, Sceadwian!
Thanks for reply!
Actually I am now doing a project that implement delay test on 74 series chip. For example, I want to have a delay test on Quad 2 inputs AND Gate chip (7408) in which i will put some test patterns into this chip and measure time required to get the outputs from this chip. Usually, this chip take nanoseconds to come out with its outputs. So, may I know how to start with the nanosecond measurement?

Thanks!
 
...So, may I know how to start with the nanosecond measurement?

Spend about $10,000 on a sampling digital oscilloscope that can sample at a rate of 1GHz (1 ns resolution)
 
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If you are looking for an easier/cheaper way to measure ns intervals without using a high speed oscilloscope or counter, forgetaboutit. There aren't any.
 
Spend about $10,000 on a sampling digital oscilloscope that can sample at a rate of 1GHz (1 ns resolution)

If this is a commercial/research project...rent one.

Ken
 
Actually you can do this for less than $1, of course it won't be as precise as a GHz scope, but it can work. Look up how a PLL phase detector is implemented...

To measure the delay of circuit X, send a clock signal of suitable frequency into it, and use a fast 74AHC XOR gate to compute the (input of X) XOR (output of X). RC filter the output. The average voltage is proportional to the time delay modulo clock period. Pay attention to layout.
 
Actually you can do this for less than $1, of course it won't be as precise as a GHz scope, but it can work. Look up how a PLL phase detector is implemented...

To measure the delay of circuit X, send a clock signal of suitable frequency into it, and use a fast 74AHC XOR gate to compute the (input of X) XOR (output of X). RC filter the output. The average voltage is proportional to the time delay modulo clock period. Pay attention to layout.

And what if outputX is a complex function of inputX, like a counter. There is no (useful) predictable, correlation between them. Your idea would work to measure a delay line, but not for measuring the delay through multilevel combinatorial logic, let alone sequential logic.
 
And what if outputX is a complex function of inputX, like a counter.

Then it doesn't work at all, or course, it would only work for measuring the delay as the OP was mentioning...

Another cheap hack : feed the DUT with a 1 MHz clock, send a 1.0001 MHz clock (put a trim in the Vcc line) to the clock input of a D flop which samples the DUT output, and you got a ghetto 10Gsps sampler, could be OK for a student project though.
 
Spend about $10,000 on a sampling digital oscilloscope that can sample at a rate of 1GHz (1 ns resolution)

sorry to burst your bubble but most HS scope have a lot more in common with PLLs than you seem to realize. they take a normal speed sample multiple times varying delays from the trigger point.

while i despise Maxim they bought Dallas that did have some good parts: https://www.electro-tech-online.com/custompdfs/2010/09/DS1124.pdf would give you 2% FS room temperature accuracy with a 0.25nS step size over a 20-84nS range.
 
And what if outputX is a complex function of inputX, like a counter. There is no (useful) predictable, correlation between them. Your idea would work to measure a delay line, but not for measuring the delay through multilevel combinatorial logic, let alone sequential logic.

Hi!
Thanks for the reply. can you send me the schematic diagram about ur suggestion as the quote above?
 
like i said, 2 programmable delay lines will allow you two determine the delay through the logic

After I read through the datasheet of DS1124, I am curious about the pin IN and OUT of the chip. How it related to the 2 programmable delay lines? How to use DS1124 to measurement the chip delay?
 
why not run several chips in series, so you get a much longer delay which is measurable, and then divide the answer?

if you want accuracy, and are prepared to spend some cash then order 100 chips. or 1000 and get much longer delays.

alternately is the info on the datasheet?
 
After I read through the datasheet of DS1124, I am curious about the pin IN and OUT of the chip. How it related to the 2 programmable delay lines? How to use DS1124 to measurement the chip delay?

2 chips: one for 0, one for delay.

connect you unknown delay between the 0 line and a flip flop data line.

clock the flip flop with your known delay.

the output of the flip flop tells you if the unknown delay is shorter or longer than your known delay.

adjust the known delay until the output of the flip flop changes.
 

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Hi to all,

I need to measure the time in the range of (1-100) nanoseconds between two events. Please suggest me any circuit or device to accomplish that. Waiting for all of your response.
 
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