# how to Design a counter which counts 0, 4, 8, 2, 6

Discussion in 'Homework Help' started by Eng Ali, Dec 20, 2011.

1. ### Eng AliNew Member

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1. Design a counter which counts 0, 4, 8, 2, 6, and repeats using:
1.a using JK flip flops
1.b using T flip flops
1.c using D flip flops

2. Modify your design in question 1.a so that the circuit works according to the following function table
X Y F
0 0 Clear
0 1 No Change
1 1 Count

3. Design a circuit that detects the pattern 010 in a serial input X considering:
3.a Overlapping
3.b No overlapping

2. ### Eng AliNew Member

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1. Design a counter which counts 0, 4, 8, 2, 6, and repeats using:
1.a using JK flip flops
1.b using T flip flops
1.c using D flip flops

2. Modify your design in question 1.a so that the circuit works according to the following function table
X Y F
0 0 Clear
0 1 No Change
1 1 Count

3. Design a circuit that detects the pattern 010 in a serial input X considering:
3.a Overlapping
3.b No overlapping

3. ### PalbertMember

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For the first question, you will want to create truth tables for the counting sequence, then use the excitation tables for the respective flip flops. This will give you the information for the karnaugh maps for each flip flop input and therefore equations flip flop inputs.

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4. ### DaveNew Member

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Increment by four an 8 bit counter.

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7. ### ljcoxWell-Known Member

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I have attached a partly completed design (that I did for someone else) for a Sychronous Modulo 6 counter.

This should give you a starting point in the art of sequential counter design.

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8. ### Eng AliNew Member

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but how many bits should i use in truth table design and how can i deal with the order of the numbers

please i need more explain .

9. ### Eng AliNew Member

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ok

but how can i deal with the order of the number
and can anyone help me with the truth table that i should start with it

10. ### ljcoxWell-Known Member

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Your counter has to count in the specified sequence.

You will need 4 Flip Flops since the highest number is 8.

So make a "Next State" table as I did in my attachment in Post #4 with 1, 2, 3 & 4 replaced by 4, 8, 2, 6 with their binary equivalents.

Then fill in the JK columns.

If I were you, I would start with the Modulo 6 counter in Post #4, understand what I did and then complete the Next State table. ie. fill in the blank cells in the table.

Then post it so I can check it for you.

Last edited: Dec 21, 2011
11. ### Eng AliNew Member

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thank you very much for your help and Excuse me for my poor language .

"I don't know what you mean by this statement."

i mean i found it hard to make a counter with these sequence of numbers
because there's not serial like 1 2 3 4 5 6 ,,,,

and this is the next state table with JK flip flop

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12. ### Eng AliNew Member

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and this is the next state table for T flip-flop

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13. ### ljcoxWell-Known Member

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The numbers don't have to be in a numeric sequence.

I'll look at your attachments later & comment on them.

14. ### Eng AliNew Member

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i Grateful to you and want you to be with me step by step if you can
and i wish to finish it before monday

15. ### ljcoxWell-Known Member

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You're welcome.

I have made some changes to your attachment since the convention is to make A the least significant digit.

Note that you only need 3 Flip Flops since A is always 0. So A is simply connected to 0 Volt.

Otherwise, what you have done is correct. The next step is to draw the Karnaugh maps for JB, JC & JD.

#### Attached Files:

• ###### KD 1.doc
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Last edited: Dec 21, 2011
16. ### ljcoxWell-Known Member

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I looked at the next state diagram of for the T flipflop case. It looks good to me.

So as before, the next step is to draw the Karnaugh maps.

17. ### Eng AliNew Member

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This is the k-map for them

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18. ### PalbertMember

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Since the highest number you're counting to, which is 8, translates to 1000, you would need 4 bits to express your outputs.

Your truth table (aka transition table in this case) will have one column for current state and one column for next state. I would also add another column for the flip flop inputs. For the current state, you would just list your numbers from top to bottom in the order you would like them to be. I.e. 0,4,8,2,6. Then the next state column would just be the numbers that come after each current state. For example, the next state after 6 would be 0 since you want to cycle through; next state after 0 would be 4 etc etc.

From that, you obtain the current state and next state transitions for each bit. For instance, the first entry, transition from 0000 to 0100, if you are looking at the second most significant bit, the transition would be from current state to next state would be 0 to 1. The excitation table of whichever flip flop you're using will tell you what this translates to as far as the flip flop input is concerned. For a D flip flop, that transition would give a D input of 1. You do this for every bit in a row. For instance, the first row, 0000 to 0100, if you're using the D flip flop, the truth table entry for the D column would be 0100 based on the transition of each bit.

Just out of curiosity, have you done state machine design much in your class?

19. ### ljcoxWell-Known Member

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You did not take full advantage of the "don't care" states.

Also, sequence the A ~ D in the reverse order & add the decimal equivalents (as in red in my Karnaugh map).

I have done JB, KB, JC & KC. Please check them & then do JD & KD. You don't need a Flip Flop for A since it is always = 0 as all of the numbers are even.

I suggest that you re-do the T tables using this technique.

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20. ### Eng AliNew Member

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i don't understand you

21. ### ljcoxWell-Known Member

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If you do it in the D ~ A order as in my Karnaugh maps, then it is easy to write the decimal equivalents in each cell of the map - as I did in red.

Then it is easy to see which states are valid & which are "don't care".

Then you can group as many "don't care" states as possible with the states that require a 1 & therefore minimse the logic.

For example, in my Karnaugh map for JB, I grouped 8 ~ 15 hence JB = D.

If I had only grouped say 8 & 9, then JB = D.C'.B' so you would need a 3 input AND gate to generate JB.

Last edited: Dec 22, 2011
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