how does processor detect overflow in unsigned arithmetic ALU operation?

[electroRF]

I'm beginning to study the DSP Core that my company uses, as I'll be in charge of different functionalities of it.

I have an overflow detection question.

when two positive signed numbers are added, then overflow can be detected by simply checking if signed-bit of result remains zero.

Then, the DSP Core can set the corresponding ALU-Status Register bit according to the result.

But if two unsigned (positive of course) numbers are added, how does a processor detect an overflow (or non-overflow) in the result?

Thank you.

 

[misterT]

I don't know how it is done in reality, but I would implement the addition of two 8 bit variables as a 9 bit addition. Then I could just check the 9th bit for overflow.

 

[NorthGuy]

The processor, sort of, does have an extra bit, which is called a "carry flag".

 

[ronsimpson]

The part I used 100000 years ago....
Two options.
1) Check the carry bit and then do something.......
2) Run in "clip" mode where any over flow number is assigned the max number. In 8 bit mode 107h would clip to ffh.

 

[KeepItSimpleStupid]

1st question: The representation of the numbers:
a) 2's complement
b) magnitude+sign

# of bits? Archetecture # of bits?

As suggested, look at the function of the carry bit.

All matter.