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i want to disable the clock. in that process can the reset pin of 555 will constantly low. more clearly i can say that i want to hold the the clock or no more pulsing state after 11111111(output of 4040).From post #2 we know that the reset pin needs to go low to stop the 555.
The 4040 has Qx outputs that start out low and after some counts go high.
If we connect a output Q through a 10k resistor to the base of a 2N2222a transistor, emitter on ground, and collector on the reset pin of the 555. When Q goes high the transistor will pull the reset (555) low?
Is that what you want?
You can stop the 555 by holding it´s reset pin low.
Use an 8-input NAND gate. Q outputs from the 4040 are the gate inputs. Gate output connects to 555 reset pin.
i want to disable the clock. in that process can the reset pin of 555 will constantly low. more clearly i can say that i want to hold the the clock or no more pulsing state after 11111111(output of 4040).
Yeah, but that's 256.How clear can I say, if you hold down the reset pin of the 555 it will hold the clock. The 555 will stop clocking and thus the 4040 will also hold.
If the 4040 is at 0000,1111,1111 one more clock will be 0001,0000,0000. Use the 1 to stop the 555. In your example you said "11111111" and "100000000" is only one more than your example.