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High side PMOS reref prob

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Oznog

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I have a buck converter driven by a 5V PIC which uses a high side PMOS at 12V. At first I used a pullup resistor on the PMOS gate and a second NMOS to pull it down, and later caught on to the idea of rereferencing the voltage.

In this case, the NMOS goes away and a large cap goes between the PIC output and the PMOS gate. A 5V zener is then put on the gate so the cap will charge to around 7V and stay charged. This would go on a 12V vehicle battery so I can't predict the voltage span very well in practice, this will charge the cap to whatever works.

First part of testing worked nicely. The gate's voltage showed a clean square wave. Then I tried loading down the converter, and then the square wave became more of a sawtooth. And if I recall correctly, the PIC pin was sawtoothed too.

What's going on here? The activity at the gate is in simplified theory not affected by drain current (the 12v source voltage is not changing under load, I checked). I assume one of those capacitive coupling effects between the drain and gate is making a significant load opposing the voltage change? PIC pins are pretty strong and I'm very surprised to see it loaded like this. What's the formal name for this? Miller effect is only for bipolars, right?
 
As Nigel said, you should post a schematic.
Regarding Miller effect, it will occur on any inverting amplifier which has capacitance between input and output. An operational integrator is really just intentional Miller effect.
 
Cap coupled level shifter... I don't have my schematic prog on this computer but it's not a complicated circuit.

Same as Fig 31 on pg 2-29, except that it's a PMOS so the Zener & pullup resistor go to Vin. I didn't put a regular diode in series with the Zener (5.1V) either- I'm not sure what that's for, ithe Zener would otherwise only turn on when the cap is charged too high (Vin dropped?) so that the positive side is above Vin, which is exactly when it SHOULD conduct to drain it.

That's a really outstanding link, great reference on ALL sorts of power transistor drivers.
 
Oznog said:
Cap coupled level shifter... I don't have my schematic prog on this computer but it's not a complicated circuit.

Same as Fig 31 on pg 2-29, except that it's a PMOS so the Zener & pullup resistor go to Vin. I didn't put a regular diode in series with the Zener (5.1V) either- I'm not sure what that's for, ithe Zener would otherwise only turn on when the cap is charged too high (Vin dropped?) so that the positive side is above Vin, which is exactly when it SHOULD conduct to drain it.

That's a really outstanding link, great reference on ALL sorts of power transistor drivers.
Link? What link? Am I blind? :?
 
Ron H said:
Oznog said:
Cap coupled level shifter... I don't have my schematic prog on this computer but it's not a complicated circuit.

Same as Fig 31 on pg 2-29, except that it's a PMOS so the Zener & pullup resistor go to Vin. I didn't put a regular diode in series with the Zener (5.1V) either- I'm not sure what that's for, ithe Zener would otherwise only turn on when the cap is charged too high (Vin dropped?) so that the positive side is above Vin, which is exactly when it SHOULD conduct to drain it.

That's a really outstanding link, great reference on ALL sorts of power transistor drivers.
Link? What link? Am I blind? :?
no i didnt see it either
 
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